Status; Main_Ri - Quectel EG25-GL Hardware Design

Table of Contents

Advertisement

4.9.2 STATUS

The STATUS pin is an open drain output for indicating the module's operation status. It can be connected
to a GPIO of DTE with a pull-up resistor, or as LED indication circuit as below. When the module is turned
on normally, the STATUS will present the low state. Otherwise, the STATUS will present high-impedance
state.
Table 22: Pin Definition of STATUS
Pin Name
Pin No.
STATUS
61
The following figure shows different circuit designs of STATUS, and you can choose either one according
to your application demands.
Module
STATUS
NOTE
The status pin cannot be used as indication of module shutdown status when VBAT power supply is
removed.

4.9.3 MAIN_RI

AT+QCFG="risignaltype","physical" can be used to configure MAIN_RI behaviors. No matter on which
port a URC is presented, the URC will trigger the behaviors of MAIN_RI pin.
The default behaviors of the MAIN_RI are shown as below, and can be changed by
AT+QCFG="urc/ri/ring". See document [3] for details.
EG25-GL_Hardware_Design
I/O
Description
Indicate the module's
OD
operation status
VDD_MCU
10K
MCU_GPIO
Figure 30: Reference Circuits of STATUS
LTE Standard Module Series
Comment
An external pull-up resistor is required.
If unused, keep it open.
Module
VBAT
2.2K
STATUS
58 / 96

Advertisement

Table of Contents
loading

Table of Contents