Chipset Features Setup - Lanner electronics EM-535 Series Manual

5.25” embedded sbc with ns geodetm cpu, lcd/vga,tv,sound,lan,ssd socket, pcmcia/compact flash /gps

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Table Of Contents

Table of Contents

3.5 C

HIPSET

EATURES

When you select the "CHIPSET FEATURES SETUP" on the main program, the screen display will

appears as:

Chipset Features Setup Screen

SDRAM CAS latency Time

SDRAM Clock Ratio Div By

16-bit I/O Recovery (CLK)

8-bit I/O Recovery (CLK)

USB Controller

Build in CPU Audio

Audio I/O Base Address

MPU-401 I/O Base Address

Audio IRQ Select

Audio Low DMA Select

Audio High DMA Select

Multiple Monitor Support

Video Memory Size

This screen controls the settings for the board's chipset.

automatically configured. However, you can change it according to your operating environment.

SDRAM CAS Latency Time: When synchronous DRAM is installed, the number of clock cycles of CAS

latency depends on the DRAM timing. Do not reset this field from the default value specified by the

system designer.

16-bit/8-bit I/O Recovery (CLK) : The I/O recovery mechanism adds bus clokc cycles between

PCI-originated I/O cycles to the ISA bus. This delay takes place because the PCI bus is so much

faster than the ISA bus.

8-bit I/O.

USB Controller: Select Enabled if your system contains a Universal Serial Bus(USB) controller and you

have USB peripherals

ETUP

ROM PCI / ISA BIOS (2A434L7H)