Auto Reset Circuit - Ublox XPLR-HPG-2 User Manual

NINA-W106 ESP32 GPIO
pin
22 GPIO1
23 GPIO3
24 GPIO4
25 GPIO2
27 GPIO0
28 GPIO5
29 GPIO18
31 GPIO14
32 GPIO15
34 ADC34/GPI35 SYS_OUT_MON
35 GPIO13
36 GPIO12
Table 1: NINA-W106 pinout
For further information, see also the NINA-W10 data sheet
4.1.3

Auto reset circuit

XPLR-HPG-2 board includes a typical auto reset circuit that connects to the BOOT0 and RESET pins
of NINA-W106, as shown in
assert the DTR and RTS control lines of the USB to Serial converter (CP2102N) and set NINA-W106
on the serial bootloader mode. More information can be found in the Espressif Automatic Bootloader
documentation [14].
Figure 13: Auto reset circuit
☞
Capacitor C41 is not mounted on the C214 board but can be added in the application design – if
needed.
UBX-22039292 - R01
C1-Public
Signal function Available from
CDC_TX -
CDC_RX -
GPIO4 / CAN_RX J2-2
LED / GPIO2 J2-1
BOOT / GPIO0 J2-4
GPIO5 / CAN_TX J2-3
uSD_SCK / SCK J10-3
LTE_DCD J5-4, J11-2
(unpopulated
JTAG, bottom side)
LTE_DTR J5-5, J11-6
(unpopulated
JTAG, bottom side)
-
LTE_DSR J5-2, J11-4
(unpopulated
JTAG, bottom side)
LTE_RI J5-3, J11-8
(unpopulated
JTAG, bottom side)
Figure 13. The circuit enables the programming tools (like
Module configuration
Notes
USB CDC RX
USB CDC TX
Needs external CAN transceiver
Host status LED (blue)
BOOT button, USB CDC RTS/CTS.
See also Auto reset circuit.
Needs external CAN transceiver.
SPI CLK connected to microSD.
UART to LTE. See LARA-R6001D LTE cat 1
JTAG JTMS. See JTAG connector
UART to LTE. See LARA-R6001D LTE cat 1 modem
JTAG JTDO. See JTAG connector.
Analog input, relative to SYS_OUT/Battery Voltage.
UART to LTE. See LARA-R6001D LTE cat 1 modem
JTAG JTCLK. See JTAG connector.
UART to LTE. See LARA-R6001D LTE cat 1 modem
JTAG JTDI. See JTAG connector.
[1] and system integration manual [2].
modem.
) to
esptool.py
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