SG Micro SGM5200 Manual page 22

SGM5200
DETAILED DESCRIPTION (continued)
Table 2. Mode Control Register Settings for Auto-1 Mode
Reset
Bits
State
DI[15:12] 0001
DI11 0
DI10 0
DI[9:7] 000
DI6 0
DI5 0
DI4 0
DI[3:0] 0000
NOTE:1. GPIO1 to GPIO3 are available only in TSSOP packaged device. TQFN device offers GPIO0 only.
Consider a case where auto-1 mode is selected to scan
channels 2 (CH2), 5 (CH5) and 6 (CH6) as represented in
Figure 9. The program register for auto-1 mode must be
programmed as described in Figure 9 before entering into
this auto sequencing mode. The device enters into auto-1
mode on receiving the auto-1 mode command in the nth
frame. This step causes the device to find the first enabled
channel in ascending order and switch the MUX for CH2 in
th
the (n+1) frame. In the (n+2)
signal on CH2, shifts out the conversion results and the
nCS
SCLK
SDI Auto-1 Start
SDO
Data CHx
Frame n
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Logic
State
0010 Selects auto-1 mode.
1 Enables programming of bits DI[10:0].
0 Device retains values of DI[10:0] from previous frame.
1 The channel counter is reset to the lowest programmed channel in the auto-1 program register.
0 The channel counter increments every conversion (no reset).
xxx Do not care.
0 Selects 0V to V
REF
1 Selects 0V to 2 × V
0 Device normal operation (no power-down).
1 Device powers down on the 16
SDO outputs current channel address of the channel on DO[15:12] followed by 12-bit conversion result
0
on DO[11:0].
GPIO3 - GPIO0 data (both input and output) is mapped onto DO[15:12] in the order shown below.
Lower data bits DO[11:0] represent 12-bit conversion result of the current channel.
1
DO15
(1)
GPIO3
GPIO data for the channels configured as output. Device will ignore the data for the channel which is
configured as input. SDI bit and corresponding GPIO information is given below.
DI3
(1)
GPIO3
th
frame, the ADC samples the
Sample Sample
CHy
t
CYCLE
Auto-1
Data CHy
Frame (n+1)
Figure 9. Example Auto-1 Mode Timing Diagram
Single-Ended, Serial Interface ADC
input range (Range 1).
input range (Range 2).
REF
th
SCLK falling edge.
DO14
(1)
GPIO2
DI2
(1)
GPIO2
MUX also internally switches to CH5. In the (n+3)
the ADC samples and shifts out the conversion result for
CH5 and the MUX also internally switches to CH6. This
process repeats until the last enabled channel is reached, in
which case the process loops back to the first enabled
channel. Entering auto-1 mode from any other mode also
causes the device to restart from the first enabled channel.
However, modifying the contents of the auto-1 mode
program register while operating in auto-1 mode causes the
device to scan for the next enabled channel.
Sample
CH2 CH5
Auto-1
Data CH2
Frame (n+2)
Scan channels CH2, CH5 and CH6
12-Bit, 1MSPS, 16 Channels,
Function
DO13
(1)
GPIO1
DI1
(1)
GPIO1
Sample
CH6
Auto-1
Data CH5
Frame (n+3)
DO12
(1)
GPIO0
DI0
(1)
GPIO0
th
frame,
Auto-1
Data CH6
SEPTEMBER 2021
22