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TPS3703
SBVS249A – MAY 2020 – REVISED JUNE 2020
10 Power Supply Recommendations
10.1 Power Supply Guidelines
This device is designed to operate from an input supply with a voltage range between 1.7 V to 5.5 V. It has a 6-V
absolute maximum rating on the VDD pin. It is good analog practice to place a 0.1-µF to 1-µF capacitor between
the VDD pin and the GND pin depending on the input voltage supply noise. If the voltage supply providing power
to VDD is susceptible to any large voltage transient that exceed maximum specifications, additional precautions
must be taken. See
SNVA849
11 Layout
11.1 Layout Guidelines
•
Place the external components as close to the device as possible. This configuration prevents parasitic errors
from occurring.
•
Avoid using long traces for the VDD supply node. The VDD capacitor, along with parasitic inductance from
the supply to the capacitor, can form an LC circuit and create ringing with peak voltages above the maximum
VDD voltage.
•
Avoid using long traces of voltage to the sense pin. Long traces increase parasitic inductance and cause
inaccurate monitoring and diagnostics.
•
Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if
possible, and only make perpendicular crossings when absolutely necessary.
11.2 Layout Example
26
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V_Sense
Sense
VDD
VDD
CT
1 ...F
GND
Figure 41. Recommended Layout
Product Folder Links:
Pull-Up Voltage
MR
GND
10 NŸ
RESET
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TPS3703
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