Texas Instruments TPS3703 Manual
Texas Instruments TPS3703 Manual

Texas Instruments TPS3703 Manual

High accuracy overvoltage and undervoltage reset ic with time delay and manual rese
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TPS3703 High Accuracy Overvoltage and Undervoltage Reset IC With Time Delay and
1 Features
Input voltage range: 1.7 V to 5.5 V
1
Undervoltage lockout (UVLO): 1.7 V
Low quiescent current: 7 µA (Max)
High threshold accuracy:
– ± 0.25% (typical)
– ± 0.7% (–40°C to +125°C)
Fixed window threshold levels
– 50-mV steps from 500 mV to 1.3 V
– 1.5 V, 1.8 V, 2.5 V, 2.8 V, 2.9 V 3.3 V, 5 V
– Available in UV threshold only
– Window tolerance available from ±3% to ±7%
User adjustable voltage threshold levels
Internal glitch immunity and hysteresis
Fixed time delay options: 50 µs, 1 ms, 5 ms, 10
ms, 20 ms, 100 ms, 200 ms
Programmable time delay option with a single
external capacitor
Open-drain active low UV and OV monitor
RESET voltage latching output mode
2 Applications
Motor drives
Factory automation and control
Home theater and entertainment
Grid infrastructure
Data center and enterprise computing
Integrated Overvoltage and Undervoltage
Detection
OV Threshold
Monitor Voltage
UV Threshold
TPS3703
1
SENSE
VDD
GND
2
3
CT
RESET
Optional
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
Order
Product
Folder
Now
Manual Reset
V
CORE
MR
6
Processor
5
10k
RESET
4
Tools &
Technical
Software
Documents
3 Description
The TPS3703 device is an integrated overvoltage
(OV) and undervoltage (UV) monitor or reset IC in
industry's smallest 6-pin DSE package. This highly
accurate voltage supervisor is ideal for systems that
operate on low-voltage supply rails and have narrow
margin supply tolerances. Low threshold hysteresis
prevent false reset signals when the monitored
voltage supply is in its normal range of operation.
Internal glitch immunity and noise filters further
eliminate false resets resulting from erroneous
signals.
The TPS3703 does not require any external resistors
for setting overvoltage and undervoltage reset
thresholds, which further optimizes overall accuracy,
cost, solution size, and improves reliability for safety
systems. The Capacitor Time (CT) pin is used to
select between the two available reset time delays
designed into each device and also to adjust the
reset time delay by connecting a capacitor. A
separate SENSE input pin and VDD pin allow for the
redundancy sought by high-reliability systems.
This device has a low typical quiescent current
specification of 4.5 µA (typical). The TPS3703 is
suitable for industrial applications and applications
that require accurate undervoltage and overvoltage
monitoring.
Device Information
PART NUMBER
TPS3703
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Overvoltage Accuracy Distribution
35
30
25
20
15
10
5
0
-0.4
-0.3
-0.2
Support &
Community
SBVS249A – MAY 2020 – REVISED JUNE 2020
(1)
PACKAGE
BODY SIZE (NOM)
WSON (6)
1.50 mm × 1.50 mm
-0.1
0
0.1
0.2
0.3
V
Accuracy (%)
IT+(OV)
TPS3703
0.4
D004

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  • Page 1 Community Folder Software Documents TPS3703 SBVS249A – MAY 2020 – REVISED JUNE 2020 TPS3703 High Accuracy Overvoltage and Undervoltage Reset IC With Time Delay and Manual Reset 1 Features 3 Description The TPS3703 device is an integrated overvoltage • Input voltage range: 1.7 V to 5.5 V (OV) and undervoltage (UV) monitor or reset IC in •...
  • Page 2: Table Of Contents

    NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Original (May 2020) to Revision A Page • APL to RTM release ................................Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 3: Device Comparison

    SBVS249A – MAY 2020 – REVISED JUNE 2020 5 Device Comparison Figure 1 shows the device nomenclature of the TPS3703. For all possible voltages, window tolerance, time delays, and UV threshold options, see Table 7. Contact TI sales representatives or on TI's...
  • Page 4: Pin Configuration And Functions

    ) to assert a reset signal . After the MR pin is MR_L deasserted the output goes high after the reset delay time(t ) expires. MR can be left floating when not in use. Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 5: Specifications

    5.5 V, whichever is smaller. (3) If the logic signal driving MR is less than V , then additional current flows into V and out of MR. Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 6: Thermal Information

    Reset time delay, TPS3703B, TPS3703F CT = Open Reset time delay, TPS3703B, TPS3703F CT = 10 kΩ to V Reset time delay, TPS3703C, TPS3703G CT = Open Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 7 [ 0.1% = -0.7%+0.8%) ] -(UV) [ -0.15% = -0.7%+0.55%) ] [-0.25%] 0.5% [-0.25%] [ -0.4% = -0.7%+0.3% ] [-0.7%] Overdrive [2.5%] below IT-(UV) Figure 2. Voltage Threshold and Hysteresis Accuracy Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 8 10 seconds, this behavior will not occur if SENSE pin is within window of operation during V power up. Figure 3. SENSE Timing Diagram Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 9: Typical Characteristics

    D006 Tested across multiple voltage options Tested across multiple voltage options Figure 8. Undervoltage Hysteresis Voltage Accuracy vs Figure 9. Overvoltage Hysteresis Voltage Accuracy vs Temperature Temperature Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 10 Overdrive (%) D011 D012 VDD = 5.5 V VDD = 5.5 V Figure 14. SENSE Glitch Immunity (VIT-) vs Overdrive Figure 15. SENSE Glitch Immunity (VIT+) vs Overdrive Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 11 2 3 4 5 7 10 2030 50 100 200 5001000 Capacitor Value (nF) Temperature (qC) tD_r D017 Figure 21. RESET Timeout vs CT Capacitor Figure 20. CT Current vs CT Value Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 12 4 5 6 7 8 10 Capacitor Value (nF) Temperature (qC) tD_r D020 Figure 22. Timeout vs CT Capacitor (0.1 to 10 nF) Figure 23. Detect Propagation Delay vs Temperature Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 13: Detailed Description

    TPS3703 version A, B and C has three time delay settings, two fixed by connecting CT pin to VDD through a resistor and leaving CT floating and a programmable time delay setting that only requires a single capacitor connected from CT pin to ground.
  • Page 14 [such as a DC-DC converter or low-dropout regulator (LDO)]. The TPS3703 has an open drain active low output that requires a pull-up resistor to hold these lines high to the required voltage logic. Connect the pull-up resistor to the proper voltage rail to enable the output to be connected to other devices at the correct interface voltage levels.
  • Page 15 V MR_H SENSE between V and V IT-(UV) IT+(OV) (3) MR is ignored during output RESET low event Figure 25. Manual Reset Timing Diagram Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 16: Device Functional Modes

    (V ) to internally pull the asserted output to GND, RESET signal is undefined and is not to be relied upon for proper device function. Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 17: Application And Implementation

    Voltage monitoring requirements vary depending on the voltage supply tolerance of the device being powered. Due to the high precision of the TPS3703 (±0.7% Max), the device allows for a wider supply voltage margins and threshold headroom for tight tolerance applications.
  • Page 18 TPS3703D µs 9.1.2.2 Programmable Reset Delay-Timing The TPS3703 reset time delay is based on internal current source (I ) to charge external capacitor (C ) and read capacitor voltage with internal comparator. The minium value capacitor is 250 pF. There is no limitation on maximum capacitor the only constrain is imposed by the initial voltage of the capacitor, if CT cap is zero or near to zero then ideally there is no other constraint on the max capacitor.
  • Page 19 9.1.3 RESET Latch Mode The TPS3703 features a voltage latch mode on the RESET pin when connecting the CT pin to common ground . A pull-down resistor is recommended to limit current consumption of the system. In latch mode, if the RESET pin...
  • Page 20 9.1.4 Adjustable Voltage Thresholds The TPS3703 0.7% maximum accuracy allows for adjustable voltage thresholds using external resistors without adding major inaccuracies to the device. In case that the desired monitored voltage is not available, external resistor dividers can be used to set the desired voltage thresholds.
  • Page 21 SBVS249A – MAY 2020 – REVISED JUNE 2020 9.1.5 Immunity to SENSE Pin Voltage Transients The TPS3703 is immune to short voltage transient spikes on the input pins. Sensitivity to transients depends on both transient duration and overdrive (amplitude) of the transient.
  • Page 22: Typical Application

    0.5 V and 5.0 V. This application calls for very tight monitoring of the rail with only ±5% of variation allowed on the 1.2V core rail. To ensure this requirement is met, the TPS3703 was chosen for its ±4% thresholds.
  • Page 23 SENSE SENSE = VDD = 3.3 V, TPS3703A4120 = VDD = 3.3 V, TPS3703A4120 RESET RESET Figure 32. TPS3703 SENSE Start Up Function Figure 33. TPS3703 VDD Start Up Function (UV), 1.141V (OV), 1.258V ramp from 0 V to 1.4 V, V = 3.3 V, CT = OPEN...
  • Page 24 SBVS249A – MAY 2020 – REVISED JUNE 2020 www.ti.com 9.2.2 Design 2: RESET Latch Mode Another typical application for the TPS3703 is shown in Figure 31. The TPS3703 is used in a RESET latch output mode. In latch mode, once RESET driven logic low, it will stay low regardless of the sense voltage. If the RESET pin is low on start up, it will also stay low regardless of sense voltage.
  • Page 25 = VDD = 3.3 V, TPS3703A4120 = VDD = 3.3 V, TPS3703A4120 RESET RESET Figure 37. TPS3703 SENSE Ramp Latch Function Figure 38. TPS3703 CT Bias Unlatch Function ramp from 0 V to 1.4 V , V = 3.3 V, V = VDD ramp up from 0 V to 3.3 V , V...
  • Page 26: Power Supply Recommendations

    Do not run sensitive analog traces in parallel with digital traces. Avoid crossing digital and analog traces if possible, and only make perpendicular crossings when absolutely necessary. 11.2 Layout Example Pull-Up Voltage V_Sense Sense 10 NŸ RESET 1 …F Figure 41. Recommended Layout Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 27: Device And Documentation Support

    Window threshold from nominal value = OV : 5%; UV: –5% threshold voltage Window threshold from nominal value = OV : 6%; UV: –6% Window threshold from nominal value = OV : 7%; UV: –7% Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 28 1.50 V 1.80 V 2.50 V 2.80 V 2.90 V 3.30 V 5.00 V Package WSON - 6 pin (1.5 mm × 1.5 mm) Reel Large reel Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Product Folder Links: TPS3703...
  • Page 29: Glossary

    12.2 Documentation Support 12.2.1 Evaluation Module An evaluation module (EVM) is available to assist in the initial circuit performance evaluation using the TPS3703. The TPS3703 evaluation module (and related user guide) can be requested at the Texas Instruments website through the product folders or purchased directly from the TI eStore .
  • Page 30 PACKAGE OPTION ADDENDUM www.ti.com 8-Aug-2020 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing Ball material (4/5) P3703A5120DSER ACTIVE WSON 3000 Call TI Call TI -40 to 125 P3703A5330DSER ACTIVE...
  • Page 31 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TPS3703 : •...
  • Page 33 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2020, Texas Instruments Incorporated...

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