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IC100
LG1123
AB25
DDR0_A[0]
DDR1_A[0]
F26
DDR0_A[1]
DDR1_A[1]
AB24
DDR0_A[2]
DDR1_A[2]
Y24
DDR0_A[3]
DDR1_A[3]
G26
DDR0_A[4]
DDR1_A[4]
Y25
DDR0_A[5]
DDR1_A[5]
G25
DDR0_A[6]
DDR1_A[6]
Y26
DDR0_A[7]
DDR1_A[7]
G24
DDR0_A[8]
DDR1_A[8]
AA26
DDR0_A[9]
DDR1_A[9]
H26
DDR0_A[10]
DDR1_A[10]
F25
DDR0_A[11]
DDR1_A[11]
H24
DDR0_A[12]
DDR1_A[12]
AA25
DDR0_A[13]
DDR1_A[13]
F24
DDR0_A[14]
DDR1_A[14]
T26
DDR0_DQ[0]
DDR1_DQ[0]
L24
DDR0_DQ[1]
DDR1_DQ[1]
U24
DDR0_DQ[2]
DDR1_DQ[2]
K26
DDR0_DQ[3]
DDR1_DQ[3]
U26
DDR0_DQ[4]
DDR1_DQ[4]
K24
DDR0_DQ[5]
DDR1_DQ[5]
U25
DDR0_DQ[6]
DDR1_DQ[6]
K25
DDR0_DQ[7]
DDR1_DQ[7]
M25
DDR0_DQ[8]
DDR1_DQ[8]
R26
DDR0_DQ[9]
DDR1_DQ[9]
L26
DDR0_DQ[10]
DDR1_DQ[10]
T24
DDR0_DQ[11]
DDR1_DQ[11]
M26
DDR0_DQ[12]
DDR1_DQ[12]
R25
DDR0_DQ[13]
DDR1_DQ[13]
M24
DDR0_DQ[14]
DDR1_DQ[14]
R24
DDR0_DQ[15]
DDR1_DQ[15]
J26
DDR0_CK
DDR1_CK
J25
DDR0_CK_N
DDR1_CK_N
P26
DDR0_DQS[0]
DDR1_DQS[0]
P25
DDR0_DQS_N[0]
DDR1_DQS_N[0]
N26
DDR0_DQS[1]
DDR1_DQS[1]
N25
DDR0_DQS_N[1]
DDR1_DQS_N[1]
J24
DDR0_CKE
DDR1_CKE
W24
DDR0_WE_N
DDR1_WE_N
V24
DDR0_RAS_N
DDR1_RAS_N
V25
DDR0_CAS_N
DDR1_CAS_N
V26
DDR0_ODT
DDR1_ODT
L25
DDR0_DM[0]
DDR1_DM[0]
T25
DDR0_DM[1]
DDR1_DM[1]
W25
DDR0_BA[0]
DDR1_BA[0]
H25
DDR0_BA[1]
DDR1_BA[1]
W26
DDR0_BA[2]
DDR1_BA[2]
AA24
DDR0_RST_N
DDR1_RST_N
E25
DDR0_ZQ_CAL
DDR1_ZQ_CAL
AB26
DDR0_VREF0
DDR1_VREF0
E26
DDR0_VREF1
DDR1_VREF1
J23
DDR0_VDDQ_1
DDR1_VDDQ_1
K23
DDR0_VDDQ_2
DDR1_VDDQ_2
L23
DDR0_VDDQ_3
DDR1_VDDQ_3
M23
DDR0_VDDQ_4
DDR1_VDDQ_4
N23
DDR0_VDDQ_5
DDR1_VDDQ_5
P23
DDR0_VDDQ_6
DDR1_VDDQ_6
R23
DDR0_VDDQ_7
DDR1_VDDQ_7
T23
DDR0_VDDQ_8
DDR1_VDDQ_8
U23
DDR0_VDDQ_9
DDR1_VDDQ_9
V23
DDR0_VDDQ_10
DDR1_VDDQ_10
W23
DDR0_VDDQ_11
DDR1_VDDQ_11
Y23
DDR0_VDDQ_12
DDR1_VDDQ_12
THE
SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE
SYMBOL MARK OF THE SCHEMETIC.
Copyright © 2013 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
DDR1 PHY VREF
DDR1_A[0-12]
+1.5VQ1
AE9
DDR1_A[0]
AF25
DDR1_A[1]
AD9
DDR1_A[2]
AD11
DDR1_A[3]
AF24
DDR1_A[4]
AE11
DDR1_A[5]
AE24
DDR1_A[6]
AF11
DDR1_A[7]
AD24
DDR1_A[8]
AF10
DDR1_A[9]
AF23
DDR1_A[10]
AE25
DDR1_A[11]
AD23
DDR1_A[12]
AE10
AD25
AF15
DDR1_DATA[0-15]
DDR1_DATA[0]
+1.5VQ1
AD20
DDR1_DATA[1]
AD14
DDR1_DATA[2]
AF21
DDR1_DATA[3]
AF14
DDR1_DATA[4]
AD21
DDR1_DATA[5]
AE14
DDR1_DATA[6]
AE21
DDR1_DATA[7]
AE19
DDR1_DATA[8]
AF16
DDR1_DATA[9]
AF20
DDR1_DATA[10]
AD15
DDR1_DATA[11]
AF19
DDR1_DATA[12]
AE16
DDR1_DATA[13]
AD19
DDR1_DATA[14]
AD16
DDR1_DATA[15]
AF22
DDR1_CLK
AE22
DDR1_CLKN
AF17
DDR1_DQS[0]
AE17
DDR1_DQS_N[0]
AF18
DDR1_DQS[1]
AE18
DDR1_DQS_N[1]
AD22
DDR1_CKE
AD12
DDR1_WEN
AD13
DDR1_RASN
AE13
DDR1_CASN
AF13
DDR1_ODT
AE20
DDR1_DM[0]
AE15
DDR1_DM[1]
AE12
DDR1_BA[0]
DDR3 1.5V/0.75V Decap
+0.75V_VREF1_D0
AE23
DDR1_BA[1]
- Place these caps near IC100
AF12
DDR1_BA[2]
AD10
+0.75V_VREF1_D1
+0.75V_VREF1_D0
DDR1_RESET_N
AD26
R216
240
1%
AF9
AE26
AC11
+1.5VQ1
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
+0.75V_VREF1_M0
+1.5VQ1
+0.75V_VREF1_M1
+1.5V
+1.5VQ1
R212
R217
1K
1K
1%
1%
L201
MLB-201209-0120P-N2
C234
C231
R213
C224
C225
R218
C228
C230
4.7uF
4.7uF
1K
0.1uF
1000pF
1K
0.1uF
1000pF
10V
1%
1%
10V
+0.75V_VREF1_D0
+1.5VQ1
+0.75V_VREF1_D1
R214
R219
1K
1K
1%
1%
R215
C227
R220
C233
C223
C226
C229
C232
1K
1K
0.1uF
0.1uF
1000pF
0.1uF
0.1uF
1000pF
1%
1%
+0.75V_VREF1_D1
+1.5VQ1
DDR3 1.5V beCaps - Place these caps near Memory
C235
C236
0.1uF
0.1uF
C237
C238
C241
C242
C244
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
IC201
DDR1_A[0-12]
H5TQ1G63DFR-PBC
+0.75V_VREF1_M0
N3
M8
DDR1_A[0]
A0
VREFCA
P7
DDR1_A[1]
A1
P3
DDR1_A[2]
A2
N2
H1
DDR1_A[3]
A3
VREFDQ
P8
DDR1_A[4]
A4
P2
DDR1_A[5]
A5
R223
R8
L8
DDR1_A[6]
A6
ZQ
240
R2
DDR1_A[7]
A7
T8
DDR1_A[8]
A8
R3
B2
DDR1_A[9]
A9
VDD_1
L7
D9
DDR1_A[10]
A10/AP
VDD_2
R7
G7
DDR1_A[11]
A11
VDD_3
N7
K2
DDR1_A[12]
A12/BC
VDD_4
T3
K8
A13
VDD_5
N1
VDD_6
M7
N9
A15
VDD_7
R1
VDD_8
M2
R9
DDR1_BA[0]
BA0
VDD_9
N8
DDR1_BA[1]
BA1
M3
DDR1_BA[2]
BA2
A1
VDDQ_1
J7
A8
DDR1_CLK
100 1%
CK
VDDQ_2
R222
K7
C1
DDR1_CLKN
CK
VDDQ_3
K9
C9
DDR1_CKE
CKE
VDDQ_4
D2
+1.5VQ1
VDDQ_5
L2
E9
CS
VDDQ_6
K1
F1
DDR1_ODT
ODT
VDDQ_7
J3
H2
DDR1_RASN
RAS
VDDQ_8
K3
H9
R221
DDR1_CASN
CAS
VDDQ_9
L3
150
DDR1_WEN
WE
J1
NC_1
T2
J9
DDR1_RESET_N
RESET
NC_2
L1
NC_3
L9
NC_4
F3
T7
DDR1_DQS[0]
DQSL
NC_6
G3
DDR1_DQS_N[0]
DQSL
C7
A9
DDR1_DQS[1]
DQSU
VSS_1
B7
B3
DDR1_DQS_N[1]
DQSU
VSS_2
E1
VSS_3
E7
G8
DDR1_DM[0]
DML
VSS_4
DDR1_DATA[0-15]
D3
J2
DDR1_DM[1]
DMU
VSS_5
J8
VSS_6
E3
M1
DDR1_DATA[0]
DQL0
VSS_7
F7
M9
DDR1_DATA[1]
DQL1
VSS_8
F2
P1
DDR1_DATA[2]
DQL2
VSS_9
F8
P9
DDR1_DATA[3]
DQL3
VSS_10
H3
T1
DDR1_DATA[4]
DQL4
VSS_11
H8
T9
DDR1_DATA[5]
DQL5
VSS_12
G2
DDR1_DATA[6]
DQL6
H7
DDR1_DATA[7]
DQL7
B1
VSSQ_1
D7
B9
DDR1_DATA[8]
DQU0
VSSQ_2
C3
D1
DDR1_DATA[9]
DQU1
VSSQ_3
C8
D8
DDR1_DATA[10]
DQU2
VSSQ_4
C2
E2
DDR1_DATA[11]
DQU3
VSSQ_5
A7
E8
DDR1_DATA[12]
DQU4
VSSQ_6
A2
F9
DDR1_DATA[13]
DQU5
VSSQ_7
B8
G1
DDR1_DATA[14]
DQU6
VSSQ_8
A3
G9
DDR1_DATA[15]
DQU7
VSSQ_9
120Hz Back-End Board
FRC-III(LG1122)
+0.75V_VREF1_M1
1%
+1.5VQ1
2011. 07. 05
2
6
LGE Internal Use Only
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