Digital I/O Terminals (Dio0 To Dio7); Digital I/O Control Terminal (Dio Ctl) For Pull-Up/Down Configuration; Ground Terminals (Agnd, Dgnd); Synchronous Dac Load Terminal (Syncld) - Measurement Computing USB-3106 User Manual

USB-3106 User's Guide

Digital I/O terminals (DIO0 to DIO7)

You can connect up to eight digital I/O lines to the screw terminals labeled
You can configure each digital bit for either input or output.
When you configure the digital bits for input, you can use the digital I/O terminals to detect the state of any
TTL level input; refer to Figure 8. When the switch is set to the +5 V USER input, DIO7 reads TRUE (1). If you
move the switch to DGND, DIO7 reads FALSE (0).
For more information on digital signal connections
For more information on digital signal connections and digital I/O techniques, refer to the Guide to Signal
Connections (available on our website at www.mccdaq.com/support/DAQ-Signal-Connections.aspx).

Digital I/O control terminal (DIO CTL) for pull-up/down configuration

All digital pins are floating by default. When inputs are floating, the state of unwired inputs are undefined (they
may read high or low). You can configure the inputs to read a high or low value when they aren't wired. Use the
connection (pin 54) to configure the digital pins for pull-up (inputs read high when unwired) or pull-
DIO CTL
down (inputs read low when unwired).
To pull up the digital pins to +5V, wire the

To pull down the digital pins to ground (0 volts), wire the


Ground terminals (AGND, DGND)

Eight analog ground (
channels. Three digital ground (
connections.
+5V

Synchronous DAC load terminal (SYNCLD)

The synchronous DAC load connection (pin 49) is a bidirectional I/O signal that allows you to simultaneously
update the DAC outputs on multiple devices. You can use this pin for two purposes:
Configure as an input (slave mode) to receive the D/A LOAD signal from an external source.

When the SYNCLD pin receives the trigger signal, the analog outputs are updated simultaneously.
SYNCLD pin must be logic low in slave mode for immediate update of DAC outputs
When the SYNCLD pin is in slave mode, the analog outputs can be updated immediately or when a positive
edge is seen on the SYNCLD pin (this is under software control.)
The SYNCLD pin must be at a low logic level for DAC outputs to update immediately. If the external source
supplying the D/A LOAD signal is pulling the SYNCLD pin high, no update will occur.
Refer to the "USB-3100 Series" section in the Universal Library Help for information on how to update DAC
outputs immediately.
DGND
Figure 8. Schematic showing DIO7 detecting the state of a switch
) connections provide a common ground for all analog voltage and current output
AGND
) connections provide a common ground for the
DGND
DIO7
+5V
terminal pin to the
DIO CTL
terminal pin to a
DIO CTL
13
Functional Details
to (pins 21 through 28).
DIO0 DIO7
terminal pin.
+5V
terminal pin.
DGND
, ,
DIO CTR SYNCLD
and