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Introduction
This document reports the functional, thermal, EMI, and efficiency measurements results for the
active clamp flyback adaptor reference design for USB Type-C™ PD source applications. This reference design meets CoC Tier
2 and DoE Level 6 efficiency requirements with a peak efficiency of 93.7% at full load.
The
STDES-65ACFADP
adopts the planar transformer technology, with an integrated GaN-based solution and digital control.
The reference design main devices are:
•
ST-ONE: a programmable digital controller for the active clamp flyback primary high-low side GaN HEMT control plus a
secondary synchronous rectifier MOSFET control and USB-PD control;
•
MASTERGAN2: a high-voltage enhancement mode GaN with a half-bridge configuration and integrated gate driver.
The
STDES-65ACFADP
is a fully assembled reference design developed for performance evaluation only, not available for sale.
TN1402 - Rev 2 - November 2022
For further information contact your local STMicroelectronics sales office.
STDES-65ACFADP test report
STDES-65ACFADP
TN1402
Technical note
65 W
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Summary of Contents for ST STDES-65ACFADP
- Page 1 GaN-based solution and digital control. The reference design main devices are: • ST-ONE: a programmable digital controller for the active clamp flyback primary high-low side GaN HEMT control plus a secondary synchronous rectifier MOSFET control and USB-PD control; •...
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Page 2: Overview
Compact, simplified PCB layout, and bill of material reduction • EMC compliant: CISPR32B/EN55032B • Planar transformer technology to achieve high-power density Figure 1. STDES-65ACFADP architecture block diagram Figure 2. STDES-65ACFADP reference design - top side TN1402 - Rev 2 page 2/35... -
Page 3: Figure 3. Stdes-65Acfadp Reference Design - Bottom Side
TN1402 Overview Figure 3. STDES-65ACFADP reference design - bottom side Fully assembled board developed for performance evaluation only, not available for sale TN1402 - Rev 2 page 3/35... -
Page 4: Specifications
TN1402 Specifications Specifications Table 1. STDES-65ACFADP electrical specifications Symbol Parameter Test conditions Minimum Nominal Maximum Unit Input parameters Input line voltage 115/230 Vrms Input line frequency 50/60 LINE = 115 V = 0 A No load input power (5 V... - Page 5 TN1402 Specifications Symbol Parameter Test conditions Minimum Nominal Maximum Unit = 0 A~3 A Peak-to-peak value with 20 MHz Output voltage ripple ripple bandwidth Output current Continuous output power Four-point average efficiency At 115 V and measured at the on-board η...
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Page 6: Test Setup
1 x 8845A 6-1/2 digit precision multimeter by FLUKE • P-NUCLEO-USB002 kit (sink emulator) to connect to the USB Type-C™ output to adjust the output voltage • Ambient temperature = 25°C Figure 4. STDES-65ACFADP test setup TN1402 - Rev 2 page 6/35... -
Page 7: Procedure
TN1402 Procedure Procedure Follow the steps below to test the reference design. Step 1. Connect the STDES-65ACFADP USB Type-C™ output to the P-NUCLEO-USB002 kit via a USB Type-C™ cable. Step 2. Connect the P-NUCLEO-USB002 to a PC computer via a USB Type-A cable. -
Page 8: Measurements/Waveforms/Test Data
The obtained results show that our reference design meets the EU CoC Rev.05 Tier 2 and DoE Level 6 requirements with an adequate margin. 4.1.1 Efficiency at 115 V input Figure 5. STDES-65ACFADP efficiency at 115 V input Table 2. STDES-65ACFADP efficiency at 115 V input with different input voltages Condition... -
Page 9: Efficiency At 230 Vac Input
TN1402 Load and line regulation test results 4.1.2 Efficiency at 230 V input Figure 6. STDES-65ACFADP efficiency at 230 V input Table 3. STDES-65ACFADP efficiency at 230 V input with different input voltages Condition Percentage of full loading 12 V... -
Page 10: Ripple And Noise
TN1402 Ripple and noise Table 5. Load and line regulation at 9 V 115 V 230 V Loading (%) SPEC limit (V) 9.08 9.09 9.07 9.08 9.06 9.09 8.73 9.27 9.07 9.07 9.06 9.05 9.02 9.02 Table 6. Load and line regulation at 12 V 115 V 230 V Loading (%) -
Page 11: Ripple And Noise Test Results
TN1402 Ripple and noise Figure 7. STDES-65ACFADP ripple and noise test setup 4.3.2 Ripple and noise test results Figure 8. Ripple and noise at 115 V input: 5 V /3 A V = 180 mV peak-peak Figure 9. Ripple and noise at 230 V... -
Page 12: Figure 10. Ripple And Noise At 115 Vac Input: 9 Vout /3 A V Peak-Peak = 152 Mv
TN1402 Ripple and noise Figure 10. Ripple and noise at 115 V input: 9 V /3 A V = 152 mV peak-peak Figure 11. Ripple and noise at 230 V input: 9 V /3 A V = 175 mV peak-peak Figure 12. -
Page 13: Figure 14. Ripple And Noise At 115 Vac Input: 15 Vout /3 A V Peak-Peak = 184 Mv
TN1402 Ripple and noise Figure 14. Ripple and noise at 115 V input: 15 V /3 A V = 184 mV peak-peak Figure 15. Ripple and noise at 230 V input: 15 V /3 A V = 203 mV peak-peak Figure 16. -
Page 14: Typical Waveforms
TN1402 Typical waveforms Typical waveforms 4.4.1 Startup Figure 18. Startup waveform • Yellow line: CH1 for low side GaN Vds • Light blue line: CH2 for low side GaN Vgs • Purple line: CH3 for clamp GaN Vgs TN1402 - Rev 2 page 14/35... -
Page 15: Normal Operation
TN1402 Typical waveforms 4.4.2 Normal operation Figure 19. Primary side typical waveform: normal operation with 230 V 20 V /1.5 A • Yellow line: CH1 for low side GaN Vds • Light blue line: CH2 for low side GaN Vgs •... -
Page 16: Normal Operation, Valley-Skipping, And Burst Modes
TN1402 Typical waveforms Figure 20. Secondary SR MOSFET Vds at 20 V 3.25 A • Yellow line: CH1 for SR MOSFET Vds • Light blue line: CH2 for low side GaN Vds 4.4.3 Normal operation, valley-skipping, and burst modes To improve the efficiency at a medium load, the controller enters in valley-skipping mode when the switching frequency increases above a programmable value. -
Page 17: Figure 21. Normal Operation Mode
TN1402 Typical waveforms Figure 21. Normal operation mode TN1402 - Rev 2 page 17/35... -
Page 18: Figure 22. Valley-Skipping Mode
TN1402 Typical waveforms Figure 22. Valley-skipping mode TN1402 - Rev 2 page 18/35... -
Page 19: Thermal Performance
Table 9. Key components temperature at 20 V /3.25 A, T = 25⁰C 115 V 230 V Devices Maximum temperature Maximum temperature MASTERGAN2 86.5 ST-ONE 75.1 74.3 Transformer 78.6 79.4 SR MOS 83.2 79.4 Bridge diode 74.5 TN1402 - Rev 2... -
Page 20: Figure 24. Thermal Performance Of The Key Components At 20 V/3.25 A, 115 Vac Input
TN1402 Typical waveforms Figure 24. Thermal performance of the key components at 20 V/3.25 A, 115 V input Figure 25. Thermal performance of the key components at 20 V/3.25 A, 230 V input TN1402 - Rev 2 page 20/35... -
Page 21: Emi Performance
TN1402 Typical waveforms 4.4.5 EMI performance Figure 26. EMI-CE at 115 V input, 20 V/3.25 A - L line Figure 27. EMI-CE at 115 V input, 20 V/3.25 A - N line TN1402 - Rev 2 page 21/35... -
Page 22: Figure 28. Emi-Ce At 230 Vac Input, 20 V/3.25 A - L Line
TN1402 Typical waveforms Figure 28. EMI-CE at 230 V input, 20 V/3.25 A - L line Figure 29. EMI-CE at 230 V input, 20 V/3.25 A - N line TN1402 - Rev 2 page 22/35... -
Page 23: Schematic Diagrams
Schematic diagrams Figure 30. STDES-65ACFADP circuit schematic - power board ES1JFL BC847CM 100NF VCCPRI OUTB 4.7K RECT 100NF SVCC 47uH 22uF 120uF 470nF 10NF 470nF 47nF 2.2Meg PV5V VI N VOUT VSENSE PZ3216D190-6R0TF 4.7UF 120K PV5V ADJ/ NC Z4GP208L 4.7UF... -
Page 24: Figure 31. Stdes-65Acfadp Circuit Schematic - Control Board
Figure 31. STDES-65ACFADP circuit schematic - control board VSRC OVP_SENSE SVDRV SVCC PHASE SRGD RECT SRVDS VCCPRI RECT VSRC OVP_SENSE BAS521LP-7 PHASE SVCC 100UF 22UF VCCPRI BSS169 STL90N10F7 BAS21LL 4.7UF Planar Transformer BSS169 100K BAS16LD SRGD 100NF 2.2UF CDZVT2R10B 15UF... -
Page 25: Bill Of Materials
TN1402 Bill of materials Bill of materials Table 10. STDES-65ACFADP bill of materials Manufacture Item Q.ty Ref. Part/value Description Order code Table 11. Power Not available for separate Power board board sale Table 12. Contro Not available for separate Control board... - Page 26 0402 47 Ω Resistor YAGEO RC0402FR-0747RL ±1%, 0402 High-power density 600 V MASTERGAN2 half-bridge , VFQFPN driver with two MASTERGAN2 9X9X1.0 31L enhancement pitch 0.6 mm mode GaN HEMTs STONE, Digital ST-ONE QSOP36 controller TN1402 - Rev 2 page 26/35...
- Page 27 TN1402 Bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code 400 mA, 38 V low-dropout LDO40LPURY, regulator with LDO40LPURY DFN6 3x3 45 µA quiescent current Z4GP208L-HF Bridge COMCHIP Z4GP208L-HF 800 V-2 A S1ML 1000 V - D2, D3 Diode Taiwan Semi S1ML R3G...
- Page 28 TN1402 Bill of materials Table 12. Control board bill of materials Item Q.ty Ref. Part/value Description Manufacturer Order code 0805 50 V 4.7 µF ±10% X7R, Ceramic capacitor C2012X7R1H475K 0805 0603 1 µF ±10% 50 V X7R, 0603 Ceramic capacitor TAIYO YUDEN UMK107AB7105KA-T 1206 22 µF ±20% 35 V, 1206 Ceramic capacitor...
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Page 29: Conclusions
TN1402 Conclusions Conclusions The test results shown demonstrate the good performances achieved by the STDES-65ACFADP. The reference design shows a peak efficiency of ~ 93.7%. It also meets CoC Tier 2 and DoE Level 6 efficiency requirements for average efficiency. -
Page 30: Appendix A Reference Design Warnings, Restrictions And Disclaimer
TN1402 Reference design warnings, restrictions and disclaimer Appendix A Reference design warnings, restrictions and disclaimer Important: The reference design is not a complete product. It is intended exclusively for evaluation in laboratory/ development environments by technically qualified electronics experts who are familiar with the dangers and application risks associated with handling electrical/mechanical components, systems and subsystems. -
Page 31: Revision History
TN1402 Revision history Table 13. Document revision history Date Revision Changes 20-Jun-2022 Initial release. 16-Nov-2022 Updated Figure 1. STDES-65ACFADP architecture block diagram. TN1402 - Rev 2 page 31/35... -
Page 32: Table Of Contents
TN1402 Contents Contents Overview ................2 Specifications . -
Page 33: List Of Tables
STDES-65ACFADP electrical specifications ........ -
Page 34: List Of Figures
STDES-65ACFADP circuit schematic - power board ........ - Page 35 ST’s terms and conditions of sale in place at the time of order acknowledgment. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of purchasers’...
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