ST STA333ML Application Note
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ST STA333ML Application Note

ST STA333ML Application Note

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Introduction
The purpose in this document is:
■
to describe how to connect the STA333ML demo board,
■
how to evaluate the demo board performance with electrical curve data,
■
how to avoid critical board and layout issues.
Application note can be configured to the 2.0 channels only. Both of the 2 channels are in
BTL mode. Each channel can deliver 20 W @ THD = 10% when Vcc = 18V and 8 load. It is
a total solution for the digital audio power amplifier in a TV application.
All the test items and graph data in this document are measured by audio precision
equipment. The test data shown in this document contains, for example, output power
versus Vcc, frequency response, THD+N versus frequency, THD+N versus output power,
FFT.
December 2006
STA333ML demo board application note
Rev 1
AN2479
Application note
1/42
www.st.com

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Summary of Contents for ST STA333ML

  • Page 1 STA333ML demo board application note Introduction The purpose in this document is: ■ to describe how to connect the STA333ML demo board, ■ how to evaluate the demo board performance with electrical curve data, ■ how to avoid critical board and layout issues.

  • Page 2: Table Of Contents

    Contents AN2479 Contents Test condition and connection of demo board ....3 Test condition ..........3 1.1.1 Jumper, power supply, signal and interface setting .

  • Page 3: Test Condition And Connection Of Demo Board

    1.1.2 Output configuration STA333ML demo board can be configured to 2.0 channels and do not require software control. It is not necessary to connect the AP interface to the PC. When the power supply, signal, interface and output have been setup, push the RESET button which allows the STA333ML demo board to function.

  • Page 4: Connection Method

    Test condition and connection of demo board AN2479 Connection method Top view of demo board. Figure 1. Block diagram External 3.3 V (not required if +3.3 V selection is set to internal) Vcc (5-18 V) +3.3 V selection L_CH output Connect to R_CH output interface board...

  • Page 5: Schematic

    AN2479 Test condition and connection of demo board 1.3.2 Schematic Figure 3. Schematic diagram PCB Layout 1.4.1 Top view of PCB layout Figure 4. Top layout 5/42...

  • Page 6: Bottom View Of Pcb Layout

    Test condition and connection of demo board AN2479 1.4.2 Bottom view of PCB layout Figure 5. Bottom layout BOM list Table 1. Item Type Package Description Reference code Manufacturer C1, C2, C3, C4, C6, C7, C11, CCAP CCAP0603 100 n, 50 V, +/- 10 % C12, C16, C17, C18, C19, C22, Murata C23, C24, C25, C34, C35...

  • Page 7: Test Connection

    Connector Through hole Any source connector Jumper Through hole 1 x 3 2.54 mm pitch JP1, JP2, JP3, JP4 Any source Through hole STA333ML Through hole 470 n C20, C26 Connector Through hole WP4-15 Song Cheng Phoenix Connector Through hole FFKDS/H1-5.08...

  • Page 8: Test Curve Report

    Test curve report AN2479 Test curve report Figure 7. Efficiency versus output power Efficiency 100.00 90.00 80.00 70.00 60.00 η(%) 50.00 40.00 30.00 20.00 10.00 0.00 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Output Power (W) Condition: R LOAD =8 ohm;...

  • Page 9: Frequency Response

    AN2479 Test curve report Figure 9. Output power@10% THD vs. supply voltage Output Power@10%THD vs. Vcc Rl=8 Ohm Rl=6 Ohm Rl=4 Ohm 9 10 11 12 13 14 15 16 17 18 Vcc (V) Frequency Response Figure 10. 18 V 4 ohm 0 dB: Pout = 1 W@ 1 KHz filter: L = 10 uH, C = 1 uF 9/42...
  • Page 10 Test curve report AN2479 Figure 11. 18 V 6 Ohm 0 dB: Pout = 1 W @ 1 KHz filter: L = 15 uH, C = 680 nF Figure 12. 18 V 8 Ohm 0 dB: Pout = 1 W @ 1 KHz filter: L = 22 uH, C = 470 nF 10/42...

  • Page 11: Thd Versus Frequency

    AN2479 Test curve report Figure 13. 6 Ohm Pout = 1 W Vcc=5 V 0.05 Vcc=12 V Vcc=18 V 0.02 0.01 THD versus frequency Figure 14. 4 Ohm Pout = 1 W Vcc=5 V 0.05 Vcc=18 V 0.02 0.01 11/42...

  • Page 12: Thd Versus Output Power

    Test curve report AN2479 Figure 15. 8 Ohm Pout = 1 W Vcc=5 V 0.05 Vcc=12 V Vcc=18 V 0.02 0.01 50 100 200 500 1k 2k 5k 10k 2.2.1 THD versus output power Figure 16. 4 Ohm (1/2) 0.05 0.02 0.01 100m...
  • Page 13 AN2479 Test curve report Figure 17. 4 Ohm (2/2) 0.05 0.02 0.01 100m 200m 500m Figure 18. 6 Ohm (1/2) 0.05 0.02 0.01 100m 200m Figure 19. 6 Ohm (2/2) 0.05 0.02 0.01 100m 200m 500m 13/42...

  • Page 14: Fft

    Test curve report AN2479 Figure 20. 8 Ohm (1/2) 0.05 0.02 0.01 100m 200m 500m Figure 21. 8 Ohm (2/2) 0.05 0.02 0.01 100m 200m 500m Figure 22. 0 dBFS@ 1 KHz 5 V 4 ohm + 10 -1 00 -1 10 -1 20 -1 30...
  • Page 15 AN2479 Test curve report Figure 23. -60 dBFS@ 1 KHz 5 V 4 ohm + 10 -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 24. 0 dBFS@ 1 KHz 5 V 6 ohm + 10 -100 -110 -120 -130 -140...
  • Page 16 Test curve report AN2479 Figure 26. 0 dBFS@ 1 KHz 5 V 8 ohm + 1 0 -1 0 -2 0 -3 0 -4 0 -5 0 -6 0 -7 0 -8 0 -9 0 -1 0 0 -1 1 0 -1 2 0 -1 3 0 -1 4 0...
  • Page 17 AN2479 Test curve report Figure 28. 0 dBFS@ 1 KHz 12 V 4 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 29. -60 dBFS@ 1 KHz 12 V 4 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 17/42...
  • Page 18 Test curve report AN2479 Figure 30. 0 dBFS@ 1 KHz 12 V 6 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 31. -60 dBFS@ 1 KHz 12 V 6 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 18/42...
  • Page 19 AN2479 Test curve report Figure 32. 0 dBFS@ 1 KHz 12 V 8 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 33. -60 dBFS@ 1 KHz 12 V 8 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 19/42...
  • Page 20 Test curve report AN2479 Figure 34. 0 dBFS@ 1 KHz 18 V 4 ohm -100 -120 -130 -140 -150 100 200 500 1k Figure 35. -60 dBFS@ 1 KHz 18 V 4 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 20/42...
  • Page 21 AN2479 Test curve report Figure 36. 0 dBFS@ 1 KHz 18 V 6 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 37. -60 dBFS@ 1 KHz 18 V 6 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 21/42...
  • Page 22 Test curve report AN2479 Figure 38. 0 dBFS@ 1 KHz 18 V 8 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k Figure 39. -60 dBFS@ 1 KHz 18 V 8 ohm -100 -110 -120 -130 -140 -150 100 200 500 1k 22/42...

  • Page 23: Cross Talk

    AN2479 Test curve report Cross talk Figure 40. 5 V 4 ohm 1 W @ 1 KHz -100 100 200 500 1k Figure 41. 12 V 4 ohm 1 W @ 1 KHz -100 100 200 500 1k 23/42...
  • Page 24 Test curve report AN2479 Figure 42. 18 V 4 ohm 1 W @ 1 KHz -100 100 200 500 1k Figure 43. 5 V 6 ohm 1 W @ 1 KHz -100 100 200 500 1k 24/42...
  • Page 25 AN2479 Test curve report Figure 44. 12 V 6 ohm 1 W @ 1 KHz -100 100 200 500 1k Figure 45. 18 V 6 ohm 1 W @ 1 KHz -100 100 200 500 1k 25/42...
  • Page 26 Test curve report AN2479 Figure 46. 5 V 8 ohm 1 W @ 1 KHz -100 100 200 500 1k Figure 47. 12 V 8 ohm 1 W @ 1 KHz -100 100 200 500 1k 26/42...
  • Page 27 AN2479 Test curve report Figure 48. 18 V 8 ohm 1 W @ 1 KHz -100 100 200 500 1k 27/42...

  • Page 28: Design Guideline For Pcb Schematic And Layout

    Design guideline for PCB schematic and layout AN2479 Design guideline for PCB schematic and layout Schematic 3.1.1 Main driver for components selection ● Absolute maximum rate: 20 V. Bypass capacitor 100 nF in parallel to 1 µF for each power Vcc branch. Preferable ●...
  • Page 29 AN2479 Design guideline for PCB schematic and layout ● The purpose of the main filter is to remove frequency higher than audible range of 20 KHz. The main filter uses the Butterworth formula to define the cut off frequency, which must be higher than 20 KHz, otherwise the frequency response is affected. ●...
  • Page 30 Design guideline for PCB schematic and layout AN2479 Figure 52. Main filter ---------------------------------------------------------------- - Lload load × Π × × INxA cutoff load load C load -------------------------------------------------- - load × Π × × cutoff Rlo ad ---------------------------------------------------------------------- - INxB cutoff ×...

  • Page 31: Layout

    AN2479 Design guideline for PCB schematic and layout Layout Solder snubber network as close as possible to the IC related pin. Figure 54. Snubber network Snubber network Use electrolytic capacitor first to separate the Vcc branches. Figure 55. Separate the Vcc branches Separate from the E-cap Minimize the path between Vcc pins and ground pin in order to avoid inductive paths.
  • Page 32 Design guideline for PCB schematic and layout AN2479 Figure 57. Dissipate thermal Big ground plane Solder PLL filter as close as possible to the FILT pin. Figure 58. PLL filter PLL filter For differential application create symmetrical paths for the output stage. 32/42...
  • Page 33 AN2479 Design guideline for PCB schematic and layout Figure 59. Dissipate thermal Symmetrical output paths Separate the coil and the neighboring coil are vertical to avoid crosstalk. 33/42...
  • Page 34 Design guideline for PCB schematic and layout AN2479 Figure 60. Avoiding crosstalk Separate the coils to avoid Vertical crosstalk Vertical It is better to use a polyester filter capacitor. Figure 61. Filter capacitor Filter capacitors should be metal or polyester Consider ground layout.
  • Page 35 11. Thermal layout with big ground (2 of 2 for thermal and soldering holes). The thermal resistance junction at the bottom of the STA333ML to the ambient obtainable with a ground copper area of 4 x 4 cm and with 35 via holes (see Figure 64).
  • Page 36 Design guideline for PCB schematic and layout AN2479 Figure 65. Vcc routing Best method to isolate the two channels Good Vcc routing Bad Vcc routing two amplifiers are daisy chained amplifiers are isolated from each other 13. Vcc filter for high frequency. The PWM system works with a fast switch (frequency of 340 KHz approximately) which means the copper wire works as a coil.
  • Page 37 AN2479 Design guideline for PCB schematic and layout Figure 66. Vcc filter Vcc capacitor filter as close to the related pins as possible. The ceramic capacitors on the bottom of the PCB close to the IC due to SMD mounting limitations.
  • Page 38 Design guideline for PCB schematic and layout AN2479 Figure 68. Snubber filter placement Place snubber circuit as close as possible to the appropriate IC pins, and the - and + for each channel. Figure 69. Examples of snubber filter placement Good common mode snubber placement Good differential snubber placement Caution:...
  • Page 39 AN2479 Design guideline for PCB schematic and layout Figure 70. Output routing Good output routing traces grow wider as space allows Good output routing Bad output routing area between outputs is small area between outputs is large 17. Thermal layout Note: The thermal pad must be connected to ground in order to properly set the IC references.
  • Page 40 Design guideline for PCB schematic and layout AN2479 Figure 71. Output routing Bad thermal layout (top) Good thermal layout (top) heat flow cut off by the snubbers heat can flow freely to the sides Good thermal layout (bottom) Bad output routing (bottom) plenty of copper area little copper area on 3 sides 40/42...

  • Page 41: Revision History

    AN2479 Revision history Revision history Table 2. Document revision history Date Revision Changes 06-Dec-2006 Initial release. 41/42...
  • Page 42 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.

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