PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
40
39
38
37
36
VX1
1
PIN 1
VX2
2
INDICATOR
VX3
3
VX4
4
ADM1063
VX5
5
TOP VIEW
VP1
6
(Not to Scale)
VP2
7
VP3
8
VP4
9
VH
10
11
12
13
14
15
NOTES
1. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM. THIS
PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS PAD
SHOULD BE SOLDERED TO THE BOARD FOR IMPROVED
MECHANICAL STABILITY.
2. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 3. LFCSP Pin Configuration
Table 2. Pin Function Descriptions
Pin No.
1
Mnemonic
LFCSP
TQFP
15, 16,
1, 12, 13, 18,
NC
19, 20
19, 22 to 25,
36, 37, 48
1 to 5
2 to 6
VX1 to VX5
(VXx)
6 to 9
7 to 10
VP1 to VP4
(VPx)
10
11
VH
11
14
AGND
12
15
REFGND
13
16
REFIN
14
17
REFOUT
17
20
SCL
18
21
SDA
21 to 30
26 to 35
PDO10 to PDO1
31
38
PDOGND
32
39
VCCP
33
40
A0
34
41
A1
35
42
D2N
36
43
D2P
35
34
33
32
31
PDO1
30
PDO2
29
PDO3
28
PDO4
27
PDO5
26
PDO6
25
PDO7
24
PDO8
23
PDO9
22
PDO10
21
16
17
18
19
20
Description
No Connection.
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to
1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the
input attenuation on a potential divider connected to these pins, the output of which connects
to a supply fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V,
and from 0.573 V to 1.375 V.
High Voltage Input to Supply Fault Detectors. Two input ranges can be set by altering the
input attenuation on a potential divider connected to this pin, the output of which connects
to a supply fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
2
Ground Return for Input Attenuators.
2
Ground Return for On-Chip Reference Circuits.
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage.
The on-board reference can be used by connecting the REFOUT pin to the REFIN pin.
Reference Output, 2.048 V. Typically connected to REFIN. Note that the capacitor must be
connected between this pin and REFGND. A 10 μF capacitor is recommended for this purpose.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
Programmable Output Drivers.
2
Ground Return for Output Drivers.
Central Charge Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this
pin and GND. A 10 μF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
External Temperature Sensor 2 Cathode Connection.
External Temperature Sensor 2 Anode Connection.
48 47 46 45 44 43 42 41 40 39 38 37
NC
1
VX1
2
VX2
3
VX3
4
VX4
5
VX5
6
VP1
7
VP2
8
VP3
9
VP4
10
VH
11
NC
12
13 14 15 16 17 18 19 20 21 22 23 24
NC = NO CONNECT
Rev. C | Page 7 of 32
PIN 1
INDICATOR
ADM1063
TOP VIEW
(Not to Scale)
Figure 4. TQFP Pin Configuration
ADM1063
NC
36
PDO1
35
PDO2
34
PDO3
33
PDO4
32
PDO5
31
PDO6
30
PDO7
29
PDO8
28
PDO9
27
PDO10
26
NC
25
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