Table of Contents
Advertisement
5.
The slave asserts ACK on SDA.
6.
The master sends a data byte.
7.
The slave asserts ACK on SDA.
8.
The master asserts a stop condition on SDA to end the
transaction.
This operation is illustrated in Figure 20.
1
2
3
SLAVE
S
W
A
ADDRESS
Figure 20. Single Byte Write to a Register
READ OPERATIONS
The ADT7467 uses the following SMBus read protocols.
Receive Byte
This operation is useful when repeatedly reading a single
register. The register address must have been set up previously.
In this operation, the master device receives a single byte from a
slave device, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address followed by the
read bit (high).
3.
The addressed slave device asserts ACK on SDA.
4.
The master receives a data byte.
5.
The master asserts NO ACK on SDA.
6.
The master asserts a stop condition on SDA and the
transaction ends.
In the ADT7467, the receive byte protocol is used to read a
single byte of data from a register whose address has previously
been set by a send byte or write byte operation. This operation
is illustrated in Figure 21.
1
2
SLAVE
S
ADDRESS
Figure 21. Single Byte Read from a Register
Alert Response Address
Alert response address (ARA) is a feature of SMBus devices that
allows an interrupting device to identify itself to the host when
multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt
output or an SMBALERT . One or more outputs can be
connected to a common SMBALERT line connected to the
4
5
6
7 8
SLAVE
A
DATA
A P
ADDRESS
3
4
5
6
R A
DATA
A P
master. If a device's SMBALERT line goes low, the following
procedure occurs:
SMBALERT is pulled low.
1.
2.
The master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
The device whose SMBALERT output is low responds to
3.
the alert response address, and the master reads its device
address. The address of the device is now known and can
be interrogated in the usual way.
If more than one device's SMBALERT output is low, the
4.
one with the lowest device address has priority in accor-
dance with normal SMBus arbitration.
5.
Once the ADT7467 has responded to the alert response
address, the master must read the status registers and the
SMBALERT is cleared only if the error condition has gone
away.
SMBUS TIMEOUT
The ADT7467 includes an SMBus timeout feature. If there is no
SMBus activity for 35 ms, the ADT7467 assumes that the bus is
locked and releases the bus. This prevents the device from
locking or holding the SMBus expecting data. Some SMBus
controllers cannot handle the SMBus timeout feature, so it can
be disabled.
Configuration Register 1(Reg. 0x40)
<6> TODIS = 0, SMBus timeout enabled (default).
<6> TODIS = 1, SMBus timeout disabled.
VOLTAGE MEASUREMENT INPUT
The ADT7467 has one external voltage measurement channel. It
can also measure its own supply voltage, V
ure V
. The V
CCP
through the V
CC
Register 1 (Reg. 0x40) allows a 5 V supply to power the
ADT7467 and be measured without overranging the V
measurement channel. The V
chipset supply voltage in computer systems.
ANALOG-TO-DIGITAL CONVERTER
All analog inputs are multiplexed into the on-chip, successive
approximation, analog-to-digital converter. This has a resolu-
tion of 10 bits. The basic input range is 0 V to 2.25 V, but the
input has built-in attenuators to allow measurement of V
without any external components. To allow for the tolerance of
the supply voltage, the ADC produces an output of 3/4 full scale
(decimal 768 or 300 hex) for the nominal input voltage and so
has adequate headroom to deal with overvoltages.
Rev. 0| Page 13 of 80
CC
supply voltage measurement is carried out
CC
pin (Pin 3). Setting Bit 7 of Configuration
input can be used to monitor a
CCP
ADT7467
. Pin 14 can meas-
CC
CCP
Advertisement
Table of Contents
Need help?
Do you have a question about the dBCool ADT7467 and is the answer not in the manual?