Advantech SKY-8101 User Manual page 120

Compact 1u high performance server based on intel xeon processor scalable family
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POST Code
0x19
0x1A
0x1B
0x1C
0x1D – 0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
____________________________________________________________________________________________________
SKY-8101S Manual V04 20180321
Description
Pre-memory South Bridge initialization is started
Pre-memory South Bridge initialization (South Bridge module
specific)
Pre-memory South Bridge initialization (South Bridge module
specific)
Pre-memory South Bridge initialization (South Bridge module
specific)
Unused
Memory initialization. Serial Presence Detect (SPD) data reading
Memory initialization. Memory presence detection
Memory initialization. Programming memory timing information
Memory initialization. Configuring memory
Memory initialization (other).
Reserved for ASL
Memory Installed
CPU post-memory initialization is started
CPU post-memory initialization. Cache initialization
CPU post-memory initialization. Application Processor(s) (AP)
initialization
CPU post-memory initialization. Boot Strap Processor (BSP)
selection
CPU post-memory initialization. System Management Mode
(SMM) initialization
Post-Memory North Bridge initialization is started
Post-Memory North Bridge initialization (North Bridge module
specific)
Post-Memory North Bridge initialization (North Bridge module
specific)
Post-Memory North Bridge initialization (North Bridge module
specific)
Post-Memory South Bridge initialization is started
Copyright 2016 Advantech Co. Ltd. All rights reserved.
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