Linux device driver 32 channel 16 bit adc (28 pages)
Summary of Contents for Tews Technologies TPMC463
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The Embedded I/O Company TPMC463 4 Channel Serial Interface RS232/RS422 Version 1.0 User Manual Issue 1.0.12 May 2020 TEWS TECHNOLOGIES GmbH Am Bahnhof 7 25469 Halstenbek, Germany Phone: +49 (0) 4101 4058 0 Fax: +49 (0) 4101 4058 19 e-mail: info@tews.com...
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2 Channel Serial RS232, 2 Channel Serial in this document at any time without notice. RS422, front panel and P14 I/O TEWS TECHNOLOGIES GmbH is not liable for any TPMC463-20R damage arising out of the application or use of the 4 Channel Serial RS232, front panel and P14 I/O device described herein.
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Clarified the difference between front- and back-I/O RS422 signals August 2010 1.0.11 General Revision August 2014 1.0.12 Fixed typos May 2020 Corrected “Size” in “Table 3 1: XR17D154 Local Space Configuration” TPMC463 User Manual Issue 1.0.12 Page 3 of 25...
1 Product Description The TPMC463 is a standard single-width 32 bit PMC module and offers 4 channels of high performance serial interface. Three different standard modules are available: The TPMC463-10R provides 4 RS232 interfaces. The TPMC463-11R provides 4 RS422 interfaces. The TPMC463-12R provides 2 RS232 and 2 RS422 interfaces.
I/O Connector 4x RJ45 Modular Jack (AMP 406 732-1) PMC P14 I/O (64 pin Mezzanine Connector) Front I/O Pinout RS232 (TPMC463-10R/-12R): Compliant to TIA/EIA-561 (EIA- 232D) RS232 (TPMC463-20R): Compliant to TIP866-TM-20 Termination RS422: 120Ω between RxD+/- and CTS+/- of each channel Programmable Baud Rates RS232: up to 921.6 kbps...
Physical Data Power Requirements TPMC463-10R: 30 mA typical @ +5V DC (no load) TPMC463-11R: 40 mA typical @ +5V DC (no load) TPMC463-12R: 35 mA typical @ +5V DC (no load) TPMC463-20R: 30 mA typical @ +5V DC (no load)
Table 3-1 : XR17D154 Local Space Configuration Device Configuration Space PCI Base Address: XR17D154 PCI Base Address 0 (Offset 0x10 in PCI Configuration Space). The TPMC463 uses the Exar XR17D154 Quad UART to provide and control the 4 channels. Device Configuration Space PCI Address Size Content...
The Device Configuration Registers control general operating conditions and monitor the status of various functions. This includes a 16 bit general purpose counter, multipurpose input/outputs (not supported by the TPMC463), sleep mode, soft-reset and device identification, and revision. They are embedded inside the UART 0 Register Set.
0x0D Reserved 0x00 Xoff-2 – Xoff Character 2 0x0E Reserved 0x00 Xon-1 – Xon Character 1 0x0F Reserved 0x00 Xon-2 – Xon Character 2 Table 3-6 : UART Channel Configuration Registers TPMC463 User Manual Issue 1.0.12 Page 12 of 25...
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(Offset of the LCR register within a UART register set) For a detailed description of the serial channel registers please refer to the XR17D154 data sheet which is available on the Exar website (www.exar.com). TPMC463 User Manual Issue 1.0.12 Page 13 of 25...
Subsystem Vendor ID 0x2E 0x1498 0x03 Subsystem ID 0x2C s.b. Table 4-2 : Configuration EEPROM TPMC463-xx Subsystem-ID Value (Offset 0x0C): TPMC463-10R 0x000A TPMC463-11R 0x000B TPMC463-12R 0x000C TPMC463-20R 0x0014 The words following the configuration data contain: The module version and revision ...
0x0000 0x000F (Front or Back I/O only) Channels with enhanced RTS & CTS 0x3A 0x0000 0x0000 0x0000 0x0000 Support for RS232 only 0x3B-0x3F Reserved Table 4-3 : Physical Configuration EEPROM Data TPMC463 User Manual Issue 1.0.12 Page 16 of 25...
5 Configuration Hints The following chart shows the UART interface mapping of the different variants of the TPMC463. TPMC463-10R TPMC463-11R TPMC463-12R TPMC463-20R RS232 RS422 RS232 RS422 RS232 RS422 RS232 RS422 UART0 UART1 UART2 UART3 Table 5-1 : UART interface mapping Other configurations are available as factory build option on a per channel base.
6 Programming Hints UART Baud Rate Programming Each of the 4 UART channels of the TPMC463 provides a programmable Baud Rate Generator. The clock of the XR17D154 UART can be divided by any divisor from 1 to 2 – 1. The divisor can be programmed by the UART channel DLM (Divisor MSB) and DLL (Divisor LSB) registers.
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3. Set UART channel EFR register bit 4 to '0' (latch modified MCR register setting). Note that the maximum baud rate for RS232 channel is 921.6 kps. Thus the minimum divisor value for RS232 channels is 0x0003 with MCR[7] = 0. TPMC463 User Manual Issue 1.0.12 Page 19 of 25...
PMC I/O. In this case ask support for special board options with front I/O only. Front Panel I/O Connector (TPMC463-1xR) The TPMC463 front panel I/O connector is a RJ45 modular jack connector (e.g. AMP# 406 732-1). Figure 7-1 : I/O Connector Pinout Signal RS232...
Front Panel I/O Connector (TPMC463-2xR) The TPMC463 front panel I/O connector is a RJ45 modular jack connector (e.g. AMP# 406 732-1). Figure 7-2 : I/O Connector Pinout Signal RS232 Signal RS422 TxD+ TxD- RxD- RxD+ Table 7-2 : Pin Assignment RJ45 Front Panel I/O Connector The RS232 pinout is compliant to TIP866-TM-20 or to the “Motorola Standard”.
TxD3 RS232 Table 7-4 : TPMC463-10R Pin Assignment Back I/O PMC Connector (P14) The DSR/RI signals are connected with the DSR and RI transceiver inputs, making both DSR and RI available at the UART. This leaves the choice which signal to use in an application.
TxD3- RS422 Table 7-6 : TPMC463-12R Pin Assignment Back I/O PMC Connector (P14) The DSR/RI signals are connected with the DSR and RI transceiver inputs, making both DSR and RI available at the UART. This leaves the choice which signal to use in an application.
TxD3 RS232 Table 7-7 : TPMC463-10R Pin Assignment Back I/O PMC Connector (P14) The DSR/RI signals are connected with the DSR and RI transceiver inputs, making both DSR and RI available at the UART. This leaves the choice which signal to use in an application.
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