Added Content To The Exciter Signal Preamplifier Section; Added Content To The Exciter Output Power Amplifier Section - Texas Instruments PGA411-Q1 Instruction Manual

Resolver sensor interface
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PGA411-Q1
SLASE76E – NOVEMBER 2015 – REVISED AUGUST 2017
Feature Description (continued)
7.3.2.2 Exciter Signal Preamplifier
The differentially balanced preamplifier conditions the exciter signal to the appropriate level for further output
amplification. In the preamplifier block, the amplification level of the exciter signal can be adjusted while the
common-mode voltage is defined by the voltage at the COMAFE pin (typically 2.5 V). The preamplifier gain is
selectable though the EXTOUT_GL bits in the DEV_OVUV1 register and affects both the preamplifier ORS
output and the power amplifier outputs as shown in
adjusted by the EXTOUT bits in the DEV_PHASE_CFG register between the limits of 0.5 V to 2 V expressed as
foot-room voltage.
4.5
2.5
0.5
For signal monitoring or different exciter topologies, the output signal from the exciter preamplifier is available at
the ORS pin of the PGA411-Q1 device. The output voltage is referenced to the voltage on the COMAFE pin. An
external power amplifier such as the ALM2402-Q1 can be connected to the ORS pin to drive very high current
sensors.
The ORS output of the exciter preamplifier is controlled by the XEXT_AMP bit in the DEV_OVUV2 register.
When this bit is set to 1, external amplifier mode is selected which enables the ORS output and disables the
internal output-power amplifier. However the default state of this bit is 0 which means that the ORS output is
disabled and the internal output-power amplifier is enabled.
7.3.2.3 Exciter Output Power Amplifier
The internal output-power amplifier consists of two identical class-AB amplifier units that are independently input
inverted to form a bridge-tied load (BTL) output topology. The exciter coil of the resolver sensor is connected at
the output of the power amplifier (essentially between the OE1 and OE2 pins).
Power to the exciter power amplifier is supplied by the VEXT and PGND pins. The applied voltage should not, in
any case, exceed the maximum rating of these pins.
To avoid output saturation (clipping), the power amplifier can be common-mode offset adjusted by the EXTOUT
bits in the DEV_PHASE_CFG register.
measured offset for each EXTOUT and EXTMODE setting. Some combinations of EXTOUT, EXTMODE, and
EXTOUT_GL will cause clipping on the OE1 and OE2 outputs.
20
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V
ORS
0
Figure 13. Exciter Preamplifier Gain
Figure 14
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Figure
13. The preamplifier can be common-mode offset
shows the common-mode offset, and table X shows the
Copyright © 2015–2017, Texas Instruments Incorporated
PGA411-Q1
www.ti.com
V
max
V
COMAFE
V
min
t

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