Texas Instruments PGA450Q1EVM User Manual
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Texas Instruments PGA450Q1EVM User Manual

Texas Instruments PGA450Q1EVM User Manual

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This user's guide describes the characteristics, operation, and use of the PGA450Q1EVM. An EVM
description, GUI description, interface requirements, and complete schematic are included.
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SLDU007C - March 2012 - Revised November 2015
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Copyright © 2012-2015, Texas Instruments Incorporated
SLDU007C - March 2012 - Revised November 2015
PGA450Q1EVM User's Guide
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Summary of Contents for Texas Instruments PGA450Q1EVM

  • Page 1: Table Of Contents

    User's Guide SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide This user’s guide describes the characteristics, operation, and use of the PGA450Q1EVM. An EVM description, GUI description, interface requirements, and complete schematic are included. Contents ....................... Read This First .......................

  • Page 2: Read This First

    When a through-hole transformer is installed, ensure that the case corners are not touching the surface mount pads. • The PGA450Q1EVM can be used to drive either a single-ended or push-pull transformer. The selection of the drive method is achieved through jumper selection. •...
  • Page 3 EVM Overview www.ti.com put in the reset state. SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 4: Power-Supply Requirements And Connections

    Power-Supply Requirements and Connections Power Supply Only one main power supply is needed. Apply 7 VDC to 18 VDC to the PGA450Q1EVM that supplies power to the entire board, except for the USB communications board and LIN which are powered by the USB communication PCB.

  • Page 5: Jumper Settings

    Although they are installed to default settings in the factory, it is recommended that the user verify that the jumpers and 0-Ω resistors are installed to their default settings before powering on the EVM. SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 6: Socket For Programming Otp

    Socket for Programming OTP The PGA450Q1EVM runs from the PGA450-Q1 device that is soldered to the board. In addition, the EVM provides a footprint for a socket to enable programming the OTP in devices that are for customer-board use. The socket is not populated by default on the EVM. The part number for the recommended socket is OTS-28-0.65-01.

  • Page 7: Pga450-Q1 Communication Interfaces

    The PGA450-Q1 device has several communication options including: SPI, LIN, and UART. All of these communication interfaces and related circuitry are present on the PGA450Q1EVM. SPI is the main communication method on the PGA450-Q1 device. The 8051W inside the device must be put in reset to communicate using SPI.

  • Page 8: Uart

    D Connector 9 100uF,SMT,35V,20%,AL MAX3221EUE+ GND_UART tssop footprint and P/N GND_UART 0.1uF,0603,50V,10%,X7R 1uF,0603,25V,10%,X7R BEAD GND_UART GND_UART 10.0k,0603,1/10W,5% Figure 5. RS232 Transceiver PGA450Q1EVM User’s Guide SLDU007C – March 2012 – Revised November 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 9: Controlling The Pga450-Q1 Memory Spaces With The Gui

    Controlling the PGA450-Q1 Memory Spaces With the GUI The PGA450Q1EVM is controlled by the user through a PC with the USB communication board and associated GUI. The PGA450Q1EVM GUI provides ways to manipulate all of the register spaces present inside the PGA450-Q1 device (ESFR, EEPROM, RAM, OTP, DEVELOPMENT RAM).

  • Page 10: Esfr Registers

    8051 MCU in the PGA450-Q1 device. The PGA450Q1EVM could potentially have two devices: a device that is soldered on the EVM and a device that is in the socket. The GUI allows programming of either device. When the device choice is...

  • Page 11: Loading A .Hex File Into The Gui

    If the Program OTP Memory from .HEX File check box was checked (default) when the .HEX file was loaded into the GUI, the OTP memory is programmed with the contents of the .HEX file. SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 12: Otp Memory Successful Programming Verification

    OTP Empty: Nothing has been programmed in the OTP. • Programmed: The OTP has been programmed with something other than the jump to DEVRAM statement. PGA450Q1EVM User’s Guide SLDU007C – March 2012 – Revised November 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 13: Devram

    Note that OTP programming may be required if the interrupt vectors are not programmed Figure 8. OTP Memory can be programmed while programming the Development RAM SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 14: Fifo/Echo

    Complete" count matches the "No. of Loops." If "USER" is displayed, the GUI will stop and wait for the user to press the green flashing "Trigger" button before continuing. PGA450Q1EVM User’s Guide SLDU007C – March 2012 – Revised November 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...
  • Page 15 Click on the "Start" button to start the first loop. Click on "Stop" at any time to stop the program immediately. SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 16: Lin Master

    LIN Master The PGA450Q1EVM GUI communicates with the PGA450-Q1 device using LIN. The USB Communication board UART is the LIN master, and the PGA450-Q1 device is the LIN slave. The GUI can be used to configure the LIN frames that are transmitted to the PGA450-Q1 device.

  • Page 17: Keil Uvision Settings For Programming Firmware To The Pga450-Q1 Devram Or Otp Memory

    Memory 10.1 Objective To modify the source code made available through the PGA450Q1EVM firmware installer, download the Keil C51 Development Tool for all 8051 devices, which includes the uVision IDE necessary to open and edit the PGA450-Q1 project file. Keil products use a license management system. Without a current license, the product runs as a lite or evaluation edition with a few limitations.

  • Page 18: Otp Target Options

    Figure 14. OTP STARTUP.A51 Example Instructions: Build the PGA450.uvproj to generate the custom .HEX file used to program the internal 8051 core. The LIN Demonstration using PGA450Q1EVM Firmware Rev 2.1 provides instructions on how to upload the .HEX file using the EVM GUI.

  • Page 19: Use Case

    After all information is entered, make sure the device is in the micro reset state, then hit the Transducer Drive and Receive button to start the burst and receive. SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 20: Monitoring The Signal Path

    The signal is viewable on the DACO pin. Only one mode can be selected at a time. See Figure 16 Figure 17 for the captured waveforms. Figure 16. Echo Analog Waveform Output (Channel1), Drive voltage (Channel 2) PGA450Q1EVM User’s Guide SLDU007C – March 2012 – Revised November 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 21: Dac Output Of Filtered Signal (Channel 2) And Drive Voltage (Channel 1)

    Use Case www.ti.com Figure 17. DAC Output of Filtered Signal (Channel 2) and Drive Voltage (Channel 1) SLDU007C – March 2012 – Revised November 2015 PGA450Q1EVM User’s Guide Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...

  • Page 22: Pga450Q1Evm Schematics And Layout Drawings

    PGA450Q1EVM Schematics and Layout Drawings www.ti.com PGA450Q1EVM Schematics and Layout Drawings V_LIN V_LIN 1.0k,0603,1/10W,5% 1.0k,0603,1/10W,5% LIN RxD LIN EN V_LIN VSUP NWAKE NWAKE LIN TxD TPIC1021AQDRQ1 220pF,0603,50V,10%,X7R FOOTPRINT OK 4/21/10 Figure 18. Schematic, LIN spacer spacer VPWR VPWR-IN VPWR B260-13-F...

  • Page 23: Schematic, Rs232

    PGA450Q1EVM Schematics and Layout Drawings www.ti.com 0.47uF,0805,50V,10%,X7R GND_UART 0.1uF,0603,50V,10%,X7R 0.47uF,0805,50V,10%,X7R GND_UART 0.47uF,0805,50V,10%,X7R GND_UART RS232 VCC ROUT ~FORCEOFF TX_232 RX_232 TOUT (RS232) 0,0603,1/8W,5% RX_232 RIN (RS232) TX_232 ~INVALID ~INVALID FORCEON GND_UART D Connector 9 100uF,SMT,35V,20%,AL MAX3221EUE+ GND_UART tssop footprint and P/N GND_UART 0.1uF,0603,50V,10%,X7R...

  • Page 24: Schematic, Pga450-Q1 (Tpic8500-Q1)

    PGA450Q1EVM Schematics and Layout Drawings www.ti.com VPWR AVDD VPWR AVDD_SOC VPWR VPWR AVDD AVDD VPWR AVDD VREG VREF VREG_SOC VREG VREG VREF VREF VREG VREF VP_OTP VP_OTP _SOC VPROG_OTP VP_OTP VPROG_OTP OUTA OUTA OUTA OUTA DVDD DVDD_SOC DVDD DVDD DVDD...

  • Page 25: Pcb Layout, Bottom

    PGA450Q1EVM Schematics and Layout Drawings www.ti.com NetJP1_1 NetJP1_1 VPWR VP_OTP_SOC VP_OTP_SOC PWR-IN PWR-IN VP_OTP_SOC AVDD_SOC VPWR hole PWR-IN VPWR NetJ1_10 AVDD_SOC VPWR VREG_SOC NetU3_27 VREG_SOC VP_OTP_SOC VP_OTP_SOC NetU3_3 NetU3_25 DVDD_SOC DVDD_SOC VPWR NetU3_23 NetU3_6 NetU3_7 NetU3_8 NetC26_1 GND_UART VPWR SCLK...
  • Page 26 Added Murata note on availability of ultrasonic sensors ................• Changed the Schematic, PGA450-Q1 (TPIC8500-Q1) ..................• Changed the PCB Layout, Top layout image Revision History SLDU007C – March 2012 – Revised November 2015 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated...
  • Page 27 IMPORTANT NOTICE FOR TI DESIGN INFORMATION AND RESOURCES Texas Instruments Incorporated (‘TI”) technical, application or other design advice, services or information, including, but not limited to, reference designs and materials relating to evaluation modules, (collectively, “TI Resources”) are intended to assist designers who are developing applications that incorporate TI products;...

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