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DEM-DAI1802
User manual
Texas Instruments DEM-DAI1802 User Manual
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Description
Block Diagram
1.2 DEM-DAI1802 Basic Connection and Operation
Configuration Controls
DEM-DAI1802 Block Diagram
Analog Input Selection (JP101/102)-CN101/102 for 2 V RMS
CN103/104 for 1 V RMS
PCM1802: HPF Bypass Control (SW051)
PCM1802: Oversampling Control (SW051)-64 F
PCM1802: Master/Slave and Oversampling Rate Selection (JP002/004/052 and SW002/051)
System-Clock Dividing Ratio for MCK: 128 F
LR-Clock Dividing Ratio (JP004)
Digital Signal I/F to PCM1802 (JP052)
Data Format Selection (JP003 and SW051)
System Clock Source Selection (JP005)-Internal Clock: X001/24.576 Mhz
External Clock Input: CN001
Manual Reset (SW003)
S/PDIF Transmitter Format: CS8404 Configuration (SW004)
Schematics and Printed-Circuit Board
DEM-DAI1802 Silkscreen
DEM-DAI1802 Top View
DEM-DAI1802 Bottom View
2.2 DEM-DAI1802 Schematics
DEM-DAI1802 Analog Section Schematic Diagram
DEM-DAI1802 A/D Converter Section Schematic Diagram
DEM-DAI1802 Regulator and Connector Schematic Diagram
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DEM DAI1802 EVM
PCM1802 With Digital Audio Transmitter
User's Guide
March 2002
DAV Digital Audio/Imaging Japan (DAL)
SLEU017
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