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This document is provided to assist platform designers using the PCI1520 dual-socket PC
Card controller.
However, this document provides design suggestions for the various options when
designing in the PCI1520.
1
PCI1520 Typical System Implementation ....................................................................................................................... 3
2
Power Considerations...................................................................................................................................................... 4
2.1
Internal Voltage Regulator ........................................................................................................................................ 4
2.2
Clamping Rails .......................................................................................................................................................... 4
2.3
Bypass Capacitors .................................................................................................................................................... 4
3
Power Switch Implementation......................................................................................................................................... 5
4
PCI Bus Interface.............................................................................................................................................................. 6
5
PC Card Interface.............................................................................................................................................................. 7
6
Miscellaneous Pin Interface............................................................................................................................................. 8
6.1
Multifunction Terminals ............................................................................................................................................. 8
6.2
SPKROUT................................................................................................................................................................. 8
6.3
SUSPEND#............................................................................................................................................................... 8
7
Interrupt Configurations .................................................................................................................................................. 9
7.1
Parallel PCI Interrupts Only....................................................................................................................................... 9
7.2
Parallel IRQ and Parallel PCI Interrupts.................................................................................................................... 9
7.3
Serial IRQ and Parallel PCI Interrupts....................................................................................................................... 9
7.4
Serial IRQ and Serial PCI Interrupts ......................................................................................................................... 9
8
Software Considerations ............................................................................................................................................... 10
8.1
EEPROM Configuration .......................................................................................................................................... 10
8.2
BIOS Considerations............................................................................................................................................... 11
8.2.1
PCI Configuration Registers (Standard).................................................................................................... 11
8.2.2
PCI Configuration Registers (TI Extension) .............................................................................................. 12
8.2.3
ExCA Compatibility Registers ................................................................................................................... 12
8.2.4
CardBus Socket Registers........................................................................................................................ 12
9
Power Management Considerations ............................................................................................................................. 13
9.1
D3 Wake Information .............................................................................................................................................. 13
9.1.1
GRST# Only Registers ............................................................................................................................. 14
9.1.2
PME# Context Registers........................................................................................................................... 15
9.2
PME#/RI_OUT# Behavior ....................................................................................................................................... 15
9.3
CLKRUN# Protocol ................................................................................................................................................. 15
9.4
SUSPEND#............................................................................................................................................................. 16
10
Pin Compatibility with Other Devices ........................................................................................................................... 16
11
Migration to the PCI1520 from the PCI1420.................................................................................................................. 17
11.1 Hardware and Pin Assignment Changes ................................................................................................................ 17
11.2 Configuration Register Changes ............................................................................................................................. 18
11.3 Other Functional Differences .................................................................................................................................. 19
12
Migration to the PCI1420 from the PCI1225.................................................................................................................. 20
12.1 Hardware and Pin Assignment Changes ................................................................................................................ 20
12.2 Configuration Register Changes ............................................................................................................................. 21
12.3 Other Functional Differences .................................................................................................................................. 21
13
Reference Schematics ................................................................................................................................................... 22
14
References ...................................................................................................................................................................... 24
ABSTRACT
Detailed information can be found in the PCI1520 data manual.
PCI1520 Implementation Guide
Contents
Application Report
SCPA033 - October 2002
Computer Connectivity Solutions
1
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Related Manuals for Texas Instruments DUAL SOCKET PC CARD CONTROLLER PCI1520
Summary of Contents for Texas Instruments DUAL SOCKET PC CARD CONTROLLER PCI1520
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Page 1: Table Of Contents
Application Report SCPA033 - October 2002 PCI1520 Implementation Guide Computer Connectivity Solutions ABSTRACT This document is provided to assist platform designers using the PCI1520 dual-socket PC Card controller. Detailed information can be found in the PCI1520 data manual. However, this document provides design suggestions for the various options when designing in the PCI1520. - Page 2 SCPA033 Figures Figure 1. Typical System Implementation ........................3 Figure 2. Power Switch Implementation..........................5 Figure 3. EEPROM Implementation..........................10 Figure 4. Reference Schematics – Page 1........................22 Figure 5. Reference Schematics – Page 2........................23 Document History Revised by Date Document Name Revision Comments 8/6/02 PCI1520 Implementation *Initial Draft...
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Page 3: Pci1520 Typical System Implementation
SCPA033 PCI1520 Typical System Implementation The figure below represents a typical implementation of the PCI1520 PC Card Controller. The device serves as a bridge between a PCI Bus and a PC Card interface. The PCI1520 will operate only with the PCI Bus as a primary bus and the PC Card interface as the secondary bus. -
Page 4: Power Considerations
Power Considerations Internal Voltage Regulator One of the major differences between the PCI1520 and previous Texas Instruments CardBus controllers is that the PCI1520 uses an internal voltage regulator to power the core logic at 2.5V. This allows for a more than 50% reduction in power consumption over previous controllers. The voltage regulator is enabled using the VR_EN# pin. -
Page 5: Power Switch Implementation
SCPA033 Power Switch Implementation The following figure shows the serial interface between the PCI1520 and the TPS2226A power switch: CLOCK VPPA Socket A VCCA DATA PCI1520 TPS2226A VPPB LATCH VCCB Socket B Pull-down for Pulldown if I2C interface using internal (optional) clock Figure 2. -
Page 6: Pci Bus Interface
SCPA033 PCI Bus Interface The PCI1520 has a 33MHz, 32 bit PCI Interface compliant with PCI Local Bus Specification Revision 2.2. PCLK, AD31:0, C/BE#3:0, PAR, DEVSEL#, FRAME#, STOP#, TRDY#, IRDY#, GNT#, and REQ# are required PCI signals. All except PCLK, GNT#, and REQ# are bussed signals. -
Page 7: Pc Card Interface
They can be tristated by setting bit 22 (CBRSVD) in the System Control register at PCI configuration offset 80h. Texas Instruments provides single socket CardBus controllers such as the PCI1510 for systems requiring only one PC card socket. However, the PCI1520 can be used as a single socket controller simply by leaving the Socket B interface floating. -
Page 8: Miscellaneous Pin Interface
SCPA033 Miscellaneous Pin Interface Multifunction Terminals The multifunction terminals (MFUNC6:0) can be programmed to serve many different roles using the Multifunction Routing register at PCI configuration offset 8Ch. The discrete ISA interrupts (IRQ15:2), INTA#, INTB#, and IRQSER are explained in Section 7 – Interrupt Configurations. CLKRUN#, D3STAT#, and RI_OUT# are discussed in Section 9 –... -
Page 9: Interrupt Configurations
SCPA033 Interrupt Configurations The PCI1520 provides system designers with great flexibility in configuring interrupts. The PCI1520 allows four interrupt modes which are selected via bits 2:1 of the Device Control register at PCI offset 92h. PCI interrupts are available on INTA# and INTB#. These signals are available on MFUNC0 and MFUNC1 respectively. -
Page 10: Software Considerations
However, it is recommended that new drivers provided by Texas Instruments be used for non-XP systems. These drivers have a few small tweaks and allow the device to be reported in Device Manager properly. -
Page 11: Bios Considerations
SCPA033 The EEPROM loading map can be found in the data manual. The following is an example data file which could be loaded into the EEPROM for use with the PCI1520: ; EEPROM Programming Data for the PCI1520 Customer Board ;... -
Page 12: Pci Configuration Registers (Ti Extension)
SCPA033 Latency Timer Register (PCI offset 0Dh) – This register indicates the number of PCI clocks the PCI1520 will be allowed access to the PCI bus if another master has its REQ# asserted. The recommended value is 40h. However, the value should be dependent on the system implementation and which devices need priority. -
Page 13: Power Management Considerations
SCPA033 Power Management Considerations D3 Wake Information A power management event (PME) is the process by which a PCI or CardBus function can request a change of its current power consumption state. Typically, a device uses PME# to request a change from a power savings state to the fully operational state, D0. PME Context is defined as the functional state information and logic required to generate PMEs, report PME status, and enable PMEs. -
Page 14: Grst# Only Registers
SCPA033 9.1.1 GRST# Only Registers Global reset places all registers in their default state regardless of the state of the PME enable bit. The GRST# signal is gated only by the SUSPEND# signal. This means that assertion of SUSPEND# blocks the GRST# signal internally, thus preserving all register contents. The registers cleared only by GRST# are: Status register (PCI offset 06h): bits 15-11, 8 Secondary status register (PCI offset 16h): bits 15-11, 8... -
Page 15: Pme# Context Registers
SCPA033 9.1.2 PME# Context Registers If the PME# enable bit (bit 8) of the power-management control/status register (PCI offset A4h) is asserted, then the assertion of PRST# will not clear the following PME# context bits. If the PME# enable bit is not asserted, then the PME# context bits are cleared with PRST#. The PME# context bits are: Bridge control register (PCI offset 3Eh): bit 6 System control register (PCI offset 80h): bits 10, 9, 8... -
Page 16: Suspend
W11 for the GHK package. The PCI1520 can also be designed on to the same PCB as other Texas Instruments CardBus controllers such as the single socket PCI1510 controller even though the two devices are not pin compatible. -
Page 17: Migration To The Pci1520 From The Pci1420
SCPA033 Migration to the PCI1520 from the PCI1420 The major differences between the PCI1520 and PCI1420 are pinout, lower power consumption, and lower cost. The pinout is changed on the PCI1520 in order to incorporate an internal voltage regulator which allows the core to operate at 2.5V. When moving from the PCI1225 to the PCI1520, please see Section 13 for the differences between the PCI1225 and PCI1420 in addition to the changes from this section. -
Page 18: Configuration Register Changes
SCPA033 11.2 Configuration Register Changes The device ID for the PCI1520 is AC55. Bit 23 in the System Control register (PCI offset 80h) is reserved on the PCI1520. On the PCI1420, this enabled PCI Bus power management specification revision 1.1 reporting. -
Page 19: Other Functional Differences
Windows 98SE. The device will function properly using this driver. However, it is recommended that new drivers provided by Texas Instruments be used for non-XP systems. These drivers have a few small tweaks and allow the device to be reported in Device Manager properly. -
Page 20: Migration To The Pci1420 From The Pci1225
SCPA033 Migration to the PCI1420 from the PCI1225 The major differences between the PCI1420 and PCI1225 are the ability to wake from the D3 power state and the integration of the pullup resistors on the PC Card interface. This is done using a global reset pin. -
Page 21: Configuration Register Changes
SCPA033 12.2 Configuration Register Changes The device ID for the PCI1420 is AC51. The PCI1420 is both Intel 82365SL-DF and 82365SL register compatible. The PCI1225 is only 82365SL-DF register compatible. Bit 2 in the System Control register (PCI offset 80h) is now ExCA Power instead of reserved to allow for SL compatibility. The ExCA Power Control register (ExCA offset 02h) also changes in SL mode. -
Page 22: Reference Schematics
SCPA033 Reference Schematics The following schematics show the most basic implementation of the PCI1520 possible. These schematics provide minimum functionality. All interrupts are routed using IRQSER. NOTE: THESE ARE THE PCI TERMINALS. PLEASE REFER TO SECTION 4 3.3VCC FOR INFORMATION ON WHICH TERMINALS NEED PULLUP RESISTORS. VCCP SERR# PERR#... -
Page 23: Figure 5. Reference Schematics
SCPA033 3.3VCC BVCC AVCC .1uF .1uF .1uF .1uF .1uF .1uF .1uF .1uF A_A15 A_CIRDY#//A_A15 B_CD1# A_A22 B_CCD1#//B_CD1# A_CTRDY#//A_A22 B_D3 A_A16 B_CAD0//B_D3 A_CCLK//A_A16 B_D11 B_CAD2//B_D11 VCCA B_D4 A_A21 B_CAD1//B_D4 A_CDEVSEL#//A_A21 B_D12 A_WE# B_CAD4//B_D12 A_CGNT#//A_WE# B_D5 A_A20 B_CAD3//B_D5 A_CSTOP#//A_A20 B_D13 B_CAD6//B_D13 B_D6 A_A14 B_CAD5//B_D6 A_CPERR#//A_A14... -
Page 24: References
SCPA033 References 1. PCI1520 GHK/PDV PC Card Controllers Data Manual (SCPS065A) 2. PCI Local Bus Specification Revision 2.2 3. PC Card Standard Revision 7.1 4. PCI Bus Power Management Interface Specification Revision 1.1 5. PCI Mobile Design Guide Revision 1.0 PCI1520 Implementation Guide... - Page 25 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.
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