Texas Instruments UCD90320 User Manual
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Texas Instruments UCD90320 User Manual

Texas Instruments UCD90320 User Manual

Sequencer and system health controller pmbus command reference
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UCD90320 Sequencer and System Health Controller
The UCD90320 Power Supply Sequencer and Monitor supports a wide range of commands that allow an
external host to configure, control, and monitor voltage rails and fans. Communication between the
sequencer and the host is via an I
The PMBus specification describes the command protocol in general terms. This document describes
implementation details that are specific to the UCD90320 Power Supply Sequencer and Monitor. If a
command is not described in this document and it is supported by a UCD90320 device (see
functions exactly as described in the PMBus specification. In which case, refer to PMBus specification for
more details.
See the device-specific data sheet for a complete description of the features.
This document makes reference to "Fusion". The TI Fusion Digital Power Designer (SLVC223) is provided
for device configuration. This Microsoft
interface for configuring, storing, and monitoring all system operating parameters.
Note: This document does not apply to any other UCD90xxx devices
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1.1
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2.1
2.2
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6.2
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6.6
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6.9
6.10
6.11
6.12
6.13
6.14
6.15
6.16
6.17
SLVUAW9C - September 2016 - Revised February 2020
Submit Documentation Feedback
2
C electrical interface using the PMBus™ command protocol.
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UCD90320 Sequencer and System Health Controller PMBus Command
Copyright © 2016-2020, Texas Instruments Incorporated
SLVUAW9C - September 2016 - Revised February 2020
PMBus Command Reference
based, graphical user interface (GUI) offers an intuitive
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User's Guide
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Reference

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  • Page 1: Table Of Contents

    UCD90320 Sequencer and System Health Controller PMBus Command Reference The UCD90320 Power Supply Sequencer and Monitor supports a wide range of commands that allow an external host to configure, control, and monitor voltage rails and fans. Communication between the sequencer and the host is via an I C electrical interface using the PMBus™...
  • Page 2 10.43 (FDh) DEVICE_ID (MFR_SPECIFIC_45) ....................Range Checking and Limits ........................Glossary List of Figures UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 3 ................... CONSTANTS for Each Device ......................Valid PWM Pin IDs ..................PWM_CONFIG Command Format SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 4 Range and Limits for PMBus Commands Trademarks Microsoft, Windows are registered trademarks of Microsoft Corporation. PMBus is a trademark of SMIF, Inc. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback...

  • Page 5: Pmbus Specification

    System Management Protocol Specification Part II – Command Language, Revision 1.2. The specification is published by the Power Management Bus Implementers Forum and is available from http://pmbus.org. The types of status supported by the UCD90320 are shown in Figure 1. Whenever any of these bits are set, the PMBALERT# line is asserted.

  • Page 6: Pmbus Status Supported By The Ucd90320

    PMBus Specification www.ti.com Figure 1. PMBus Status Supported by the UCD90320 UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 7: Manufacturer Specific Status (Status_Mfr_Specific)

    This pseudo floating-point notation allows values as large as ≈33E6 down to ≈15E-6 to be sent over the PMBus. The internal variables used by the UCD90320 firmware are mostly 16 bits wide and do not support such a wide range of values. The resolution of a PMBus setting depends strongly on both the exponent of the PMBus value (larger values have coarser resolution) and the scaling of the internal variables.

  • Page 8: Distinguishing Between Linear Data Formats

    UCD90320 and the value that was later read back from it. This is normal and compliant, described in section 7.4 of the PMBus specification.

  • Page 9: Memory Model

    Operating Memory. Alert Response Address Support UCD90320 supports using the PMBALERT# line to notify the host of warning or fault conditions, but it does not support the Alert Response Address protocol. SLVUAW9C – September 2016 – Revised February 2020...

  • Page 10: Supported Pmbus Commands

    TI provided GUI (Fusion). In normal operation, only a subset of the commands are used frequently. Those commands are highlighted in bold font. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 11: Pmbus Commands

    NACK. If this occurs, wait 100 ms and retry the command. This note only applies if the brownout feature is not enabled (see Brownout Enable in MISC_CONFIG). SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...
  • Page 12 These values are only applied when associated voltage is in regulation. If there is not an associated voltage monitor, these values are applied after the rail is enabled and after TON_DELAY. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...
  • Page 13 STATUS_TEMPERATURE Read Byte Byte PAGE √ √ √ √ √ √ √ Read Only SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 14 R/W Block √ √ √ √ √ √ √ √ MFR_DATE String Common (6 bytes) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 15 (45) √ √ √ √ √ √ √ √ (MFR_SPECIFIC_05) temperature, and so forth) SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 16 Fan configuration – fault detection, auto adjust, Byte Array Common √ √ √ (MFR_SPECIFIC_24) (15 Bytes) and so forth UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 17 √ √ √ √ (MFR_SPECIFIC_45) (up to 32 bytes) version information of the controller SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 18 Table 2. PMBus Commands (continued) Code Transaction Data Format Command Scope Page Comments (hex) Type [Units] Mfr_Specific_Extended_Command PMBUS_Extended_Command UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 19: Implementation Details For Pmbus Core Commands

    The STORE_DEFAULT_ALL command saves the PMBus parameters from Operating Memory into the Default Store in Data Flash. The UCD90320 uses the most recently written set of Default Store values at startup or after a RESTORE_DEFAULT_ALL command. If the Default Store has never been written, values from the hard-coded memory are used.

  • Page 20: 12H) Restore_Default_All

    (all LINEAR16 commands). The command includes a 3- bit Mode field and a 5-bit Parameter field. In UCD90320, the Mode field is a read-only and is fixed to 000b(linear data format, described in Section 2.1).

  • Page 21: 38H) Iout_Cal_Gain

    Rev 1.0 of the PMBus specification used resistance (not conductance) and milliohms. Rev 1.2 has cleared up this ambiguity and revert to the Rev 1.0 wording. For the UCD90320 devices, the ambiguous language in Rev 1.1 is interpreted to have the same meaning as Rev 1.0 (that is, milliohms).

  • Page 22: 62H) Ton_Max_Fault_Limit

    For the UCD90320, this command will instead "set an upper limit, in ms, on how long the unit can attempt to power up the output without reaching the POWER_GOOD_ON voltage level."...

  • Page 23: 6.13 (8Dh) Read_Temperature_1

    FAN_16_FAULT Fan 16 Fault 6.13 (8Dh) READ_TEMPERATURE_1 This read-only command returns the temperature from a sensor embedded inside the UCD90320 controller. 6.14 (8Eh) READ_TEMPERATURE_2 This paged command returns the temperature from an external temperature sensor located in or near an output power module.

  • Page 24: 90-93H) Fan_Speed_1 Through Fan_Speed_4

    6.15 (90-93h) FAN_SPEED_1 Through FAN_SPEED_4 The UCD90320 device does not support a fan function. 6.16 (ADh) IC_DEVICE_ID This command is added in PMBUS1.2. It is used to read the part number of the device.

  • Page 25: Input And Output Pin Configuration

    Because the interactions between settings are so complex and depend on the order in which the PMBus commands are issued, the UCD90320 firmware does not attempt to detect and prevent all possible invalid setting combinations. The Fusion Digital Power Designer GUI provides some additional validity checking, but it is ultimately up to the user to ensure that conflicting GPIO configurations are not selected.
  • Page 26 EN17(GPIO) EN18(GPIO) EN19(GPIO) EN20(GPIO) EN21(GPIO) EN22(GPIO) EN23(GPIO) EN24(GPIO) EN25(GPIO) EN26(GPIO) EN27(GPIO) EN28(GPIO) EN29(GPIO) EN30(GPIO) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 27 LGPO15(GPIO) LGPO16(GPIO) DMON1(GPIO) DMON2(GPIO) DMON3(GPIO) DMON4(GPIO) DMON5(GPIO) DMON6(GPIO) DMON7(GPIO) DMON8(GPIO) GPIO1 GPIO2 GPIO3 GPIO4 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 28: Pwm Configuration

    PWMs Table 12. PWM-Supported Frequencies PWM Type Supported Frequencies 1 kHz to 1 MHz UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 29: Implementation Details For User Data Commands

    Application can call RAILS_WARNING and RAILS_VALUE command to retrieve the rest black box log information. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 30: B6H) Black_Box_Fault_Rails_Warning(User_Data_06)

    Rail 2 warning status same as Rail1 … … … Rail N warning status same as Rail1 UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 31: B7H) Black_Box_Log_Rails_Value(User_Data_07)

    BYTE_COUNT = 2 Number Profile Profile Index Bit description: 7:4: Read only 3:0: profile index SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 32: Rail_Profile Command Format (Read)

    4 profiles with total 50 sharing profile pool. Once all 50 profiles have been allocated, no new profile shall be added and Device shall NACK host. The profile index shall range from 0 to 3. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...

  • Page 33: B9H) Rail_State (User_Data_09)

    TOFF_MAX_WARN_LIMIT is not set to unlimited; or If the turn off is triggered by a fault action, rail must not be under fault retry to show RAMP DOWN state. Otherwise, IDLE state is present. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 34: Implementation Details For Manufacturer-Specific Commands

    Reserved(must be set to 0) Reserved(must be set to 0) Reserved(must be set to 0) Other Mask UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 35: D1H) Vout_Cal_Monitor (Mfr_Specific_01)

    The VOUT_CAL_MONITOR has two data bytes formatted as a two’s-complement binary integer. The effect on this command depends on the settings of the VOUT_MODE command SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 36: D2H) System_Reset_Config (Mfr_Specific_02)

    GPI 22 GPI 21 GPI 20 GPI 19 GPI 18 GPI 17 GPI 16 UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 37 These bits define how long the reset pin is asserted. This byte is formatted according the 8-bit time encoding defined in Section 2.5. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 38: D3H) System_Watchdog_Config (Mfr_Specific_03)

    The state of the input pin only gets checked every millisecond. Therefore, the minimum time-between-toggles on the input pin must be no less than two milliseconds. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...
  • Page 39 Time before monitoring the Input Pin again. 10.4.3 Max Fan Speed With Timeout If this bit is set, all fans are set to the maximum speed when a watchdog timeout occurs. The UCD90320 device does not support this feature. 10.4.4...

  • Page 40: D4H) System_Watchdog_Reset (Mfr_Specific_04)

    It can be up to the number of monitors supported by the given device (see Table 31). The UCD90320 NACKs the command if the size exceeds this number. The MONITOR_CONFIG read command always returns information on all of the monitors in a given package.

  • Page 41: Monitor_Config Command Format

    Due to the fact that the power supply and UCD90320 may not change Vout setpoint simultaneously or with the same slew rate, UCD90320 will take the following steps to avoid false-triggering warn/fault. If the new VOUT setpoint is higher than the current VOUT setpoint, the OV warn/fault thresholds will be immediately set to their respective new levels;...

  • Page 42: Monitor Type And

    The number of monitor pins varies based on the device. UCD90320 has 24 ADC monitors and 8 GPI monitors available. Any attempt to use a monitor number that is not available on a given device (denoted by “Error”...

  • Page 43: D6H) Num_Pages (Mfr_Specific_06)

    After this command is received, it takes approximately 50 milliseconds for the device to enter ROM mode and become responsive to addition commands. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 44: Dah) User_Ram_00 (Mfr_Specific_10)

    The first 3 pins configured with the GPI_CONFIG command (see Section 10.39) can be used to select 1 of 8 system states. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback...

  • Page 45: Gpi Selection Of System States

    System State 5 (Byte 1) System State 5 (Byte 2) System State 5 (Byte 3) SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 46 PAGE5 PAGE4 PAGE3 PAGE2 PAGE1 PAGE0 ON/OFF ON/OFF ON/OFF ON/OFF ON/OFF ON/OFF ON/OFF ON/OFF UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 47: Deh) Resequence (Mfr_Specific_14)

    Maximum Number of Entries in the Logged Fault Detail (see Section 10.26) Maximum Number of PWM outputs SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 48: E0H) Pwm_Select (Mfr_Specific_16)

    A map file specific to the firmware release may be required to determine the offset for a particular RAM variable, because variables may be in different locations for each release. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...

  • Page 49: E3H) Parm_Value (Mfr_Specific_19)

    This paged, read/write block command sets the response to each fault condition. This command is used instead of these standard PMBus commands: SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 50: Fault_Responses Command Format

    “Time between Resequences” byte in the MISC_CONFIG command (see Section 10.42) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 51 This byte is formatted according to Section 2.5. For UCD90320, the minimum value is 1ms. This retry count is reset whenever the rail stays in regulation for a TON_MAX_FAULT_LIMIT amount of time without having a glitch. (If TON_MAX_FAULT_LIMIT is set to 0, 4 seconds are used for the time.) Glitches on faults where the Operation bit is set to zero are ignored.

  • Page 52: Eah) Logged_Faults (Mfr_Specific_26)

    Can Generate a Description LOGGED_FAULT_DETAIL Entry? LOG_NOT_EMPTY System Watchdog Timeout resequence Error Watchdog Timeout Reserved UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 53: Gpi Fault Log Bit Definitions

    GPI_19 GPI_20 GPI_21 GPI_22 GPI_23 Byte 3 GPI_24 GPI_25 GPI_26 GPI_27 GPI_28 GPI_29 GPI_30 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 54: Ebh) Logged_Fault_Detail_Index (Mfr_Specific_27)

    The page that the fault occurred on (when applicable) • The type of fault (see Section 10.24) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 55: Logged_Fault_Detail Command Format

    The Days field is a 32-bit value where the top bits are used to encode other information as shown in Table SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 56: Edh) Logged_Page_Peaks (Mfr_Specific_29)

    LINEAR11 format. The temperature is from the external temperature sensor associated with this page and is the same one reported by the READ_TEMPERATURE_2 command. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 57: Eeh) Logged_Common_Peaks (Mfr_Specific_30)

    GPI Enable Flags - Byte 0 (LSB) GPI Enable Flags - Byte 1 GPI Enable Flags - Byte 2 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 58: F0H) Execute_Flash (Mfr_Specific_32)

    If the device is in ROM mode, this command starts the device executing in FLASH mode. If the device is already in FLASH mode, the command has no effect. This command is not supported by UCD90320. 10.31 (F1h) SECURITY (MFR_SPECIFIC_33) This Read/Write Block common command allows certain commands to be write-protected.

  • Page 59: F2H) Security_Bit_Mask (Mfr_Specific_34)

    0x00 (security off), 0x01 (security on), 0x02 (Invalid password). 10.32 (F2h) SECURITY_BIT_MASK (MFR_SPECIFIC_34) This command is not supported by the UCD90320 device. 10.33 (F3h) MFR_STATUS (MFR_SPECIFIC_35) This is a R/W block common command. The Manufacturer Status bits are defined in Table 55.
  • Page 60 HARDCODED_PARMS status bit is cleared. It also can be cleared with the CLEAR_FAULTS command. PKGID_MISMATCH Hardware Package ID does not match firmware UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback...

  • Page 61: F4H) Gpi_Fault_Responses (Mfr_Specific_36)

    GPI Fault Responses – GPI 23 GPI Fault Responses – GPI 24 GPI Fault Responses – GPI 25 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 62: Rail Profile Pin Selection

    Profiles Profiles Selection 2 Selection 1 De-asserted De-asserted De-asserted Asserted Asserted De-asserted Asserted Asserted UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 63: F5H) Margin_Config (Mfr_Specific_37)

    If it is determined that the rail should be on, the enable pin is asserted. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 64: Seq_Config Command Format

    Sequence On Dependencies. Turn on delay (TON_DELAY) is applied after the page has been commanded on and Sequence On Dependencies are met. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...
  • Page 65 Each of the 32 pages has its own GPI Sequence Off Dependency Mask, whose bits are defined as follows: Purpose GPI31 GPI30 GPI29 GPI28 GPI27 GPI26 GPI25 GPI24 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 66: Sequencing Timeout Configuration Byte

    When this occurs, a status bit will be set. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...
  • Page 67 10.36.9 Fault Slaves Mask Each of the 213 pages has its own Fault Slaves Mask, whose bits are defined as follows: SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 68: F7H) Gpo_Config_Index (Mfr_Specific_39)

    10.37 (F7h) GPO_CONFIG_INDEX (MFR_SPECIFIC_39) This R/W Byte common command selects the index of the GPO that will be used for later GPO_CONFIG commands. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 69: F8H) Gpo_Config (Mfr_Specific_40)

    Figure 2 implies that the device supports 12 rails (0 to 11). For the UCD90320, this is not the case. It only supports 32 rails and the interpretation of this information should be adjusted for the correct number of rails.

  • Page 70: Factors Determining The State Of A Gpo

    5: Invert OR Output 4: Ignore Inputs During Delay 3:0: High Resolution Delay Count Millisecond Delay UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 71 GPI Mask (Byte !) GPI Mask (Byte 2) GPI Mask (Byte 3 – MSB) SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 72: Ignore Inputs On

    GPO simply follows the state of a GPI with a 3 millisecond delay on assertion and de-assertion. Figure 3. Ignore Inputs On UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 73: Ignore Inputs Off

    When this bit is set, the associated AND path result is inverted before it is fed into the OR gate. This can be used to change the AND operation into an OR operation, (a’ AND b’)’ = (a OR b). SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 74: State Machine

    This behavior is configured by setting the “State Machine Mode Enable”, configuring AND path 0 as (GPI1’ AND GPI2’)’, and configuring AND path 1 as (GPI1 AND GPI2). UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020...
  • Page 75 GPI to 1 causes the associated state to be inverted. Setting the bit to 0 has no effect. SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback...

  • Page 76: Status Types

    TRUE state. Table 63. Status Types Encoding Status Type POWER_GOOD MARGIN_EN MRG_LOW_nHIGH UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 77 Example 2: GPO = (NOT POWER_GOOD[0]) OR (NOT POWER_GOOD[2]) OR (NOT POWER_GOOD[5]) OR (NOT POWER_GOOD[7]) SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 78 GPI Mask 1 = 0x91 GPI Inversion Mask 1 = 0x90 Status Mask 2 = 0x0000 UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 79 GPI Mask 2 = 0x00 Status Mask 3 = 0x0000 GPI Mask 3 = 0x00 SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 80: F9H) Gpi_Config (Mfr_Specific_41)

    NOTE: The input pin configurations, if used, must start in the Input Pin Configuration byte and continue in consecutive order with no gaps. That is, no Unused-Mode Pin Configurations can be between any Input-Mode Pin Configurations. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 81: Fault Enable Bits

    GPI_22 Pin Configuration GPI_23 Pin Configuration GPI_24 Pin Configuration GPI_25 Pin Configuration GPI_26 Pin Configuration SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 82 TOFF_MAX Warning OT_FAULT SEQ_ON_TIMEOUT VOUT_UV_FAULT IOUT_OC_FAULT OT_WARNING SEQ_OFF_TIMEOUT VOUT_UV_WARNING IOUT_OC_WARNING SLAVE_FAULT RESEQUENCE_ERROR All GPI de-asserted UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 83: Fah) Gpio_Select (Mfr_Specific_42)

    10.42.1 Miscellaneous Configuration Byte The bit definitions for the Miscellaneous Configuration Byte are shown in Table SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 84: Fdh) Device_Id (Mfr_Specific_45)

    1. The first section is the hardware device ID (e.g., ‘UCD90xxx ”). 2. The second section contains the firmware version information. Its format is “A.BB.C.DDDD”, where: A = Major Release Level (1 character) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright ©...

  • Page 85: Range Checking And Limits

    3. The third section contains the firmware compilation date. The date is reported in YYMMDD format, similar to the MFR_DATE command. 4. The optional fourth section may contain device-specific info. Example: A typical DEVICE_ID string is UCD90320|3.00.0.3029|160915. In this example, Hardware device = UCD90320 Firmware Major Release = 3...
  • Page 86 Not Supported VIN_OV_FAULT_LIMIT Not Supported VIN_OV_FAULT_RESPONSE Not Supported VIN_OV_WARN_LIMIT Not Supported VIN_UV_WARN_LIMIT Not Supported UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 87 Not Supported READ_FREQUENCY Not Supported READ_POUT Not Supported READ_PIN Not Supported PMBUS_REVISION Read Only SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 88 Index is checked to verify that it points to a valid base PARM_INFO (MFR_SPECIFIC_18) address PARM_VALUE (MFR_SPECIFIC_19) UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...
  • Page 89 GPIO_CONFIG (MFR_SPECIFIC_43) MISC_CONFIG (MFR_SPECIFIC_44) Device DEVICE_ID (MFR_SPECIFIC_45) dependent Mfr_Specific_Extended_Command Not Supported PMBUS_Extended_Command Not Supported SLVUAW9C – September 2016 – Revised February 2020 UCD90320 Sequencer and System Health Controller PMBus Command Reference Submit Documentation Feedback Copyright © 2016–2020, Texas Instruments Incorporated...

  • Page 90: Glossary

    Data Flash. Nonvolatile memory used for the UCD90xxx boot algorithms and some common data Read-only memory tables. UCD90320 Sequencer and System Health Controller PMBus Command SLVUAW9C – September 2016 – Revised February 2020 Reference Submit Documentation Feedback...
  • Page 91 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2022, Texas Instruments Incorporated...

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