Supermicro X11DPG-HGX2 User Manual page 83

Restore NVDIMMs
Select Enable to restore the functionality and the features of NVDIMMs. The options are
Enable and Disable.
Interleave NVDIMMs
If this item is set to Enable, all onboard NVDIMM modules will be configured together as
a group for the interleave mode. If this item is set to Disable, individual NVDIMM modules
will be configured separately for the interleave mode. The options are Enable and Disable.
Reset Trigger ADR (Async DIMM Self-Refresh)
Upon system power loss, an ADR sequence will be triggered to allow ADR to flush the
write-protected data buffers in the memory controller and place the DRAM memory in self-
refresh mode. When this process is complete, the NVDIMM will then take control of the
DRAM memory and transfer the contents to the onboard Flash memory. After the transfer is
complete, the NVDIMM goes into a zero power state. The data transferred will be retained
for the duration specified by the flash memory. The options are Enable and Disable.
S5 Trigger ADR
Select Enabled to support S5-Triggered ADR to enhance system performance and data
integrity. The options are Disable and Enable.
2X Refresh Enable
Select Enable for memory 2X refresh support to enhance memory performance. The options
are Auto, Disable and Enable.
Page Policy
Use this feature to set the page policy for onboard memory support. The options are Auto,
Closed and Adaptive.
IMC Interleaving
Use this feature to configure interleaving settings for the IMC (Integrated Memory Controller),
which will improve memory performance. The options are Auto, 1-way Interleave and 2-way
Interleave.
Memory Topology

This item displays the information of onboard memory modules as detected by the BIOS.
•
P1 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/
DIMME1/DIMME2/DIMMF1/DIMMF2
•
P2 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/
DIMME1/DIMME2/DIMMF1/DIMMF2
83
Chapter 4: UEFI BIOS