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Super X11DPG-HGX2 User's Manual
I
C Bus for VRM
2
Jumpers JVRM1 and JVRM2 allow the BMC or the PCH to access CPU and memory VRM
VRM controllers.
BT1
MH4
BATTERY
CPU2
J23
J24
J21
J22
J19
J20
2
1
JPME1
FAN1
BMC
BIOS LICENSE
MH10
HDD0
JLAN1
JUSBRJ45
JVGA
IPMI_LAN
USB1/2(3.0)
LAN1/LAN2
VGA
VRM
Pin Definitions
Jumper Setting
Definition
Closed(Default)
BMC
Open
PCH
MH1
MH2
JMB_E4
JMB_E1
JMB_E2
JMB_E3
J8
J14
J13
J16
J15
J18
J17
J11
J12
J9
J10
J7
JTPM1
MH20
MH24
PCH
MH21
MH25
X11DPG-HGX2
REV:1.01
DESIGNED IN USA
JSDCARD1
LED1
SD CARD
LED2
M.2-P1
M.2-P2
JM2-1
JM2-2
MH11
DA6
DA11
HDD2
HDD1
DA4
DA10
58
MH3
JMB_E5
JMB_E6
CPU1
J2
J1
J4
J3
J6
J5
FAN3
BAR CODE
MAC CODE
MH7
SAN MAC
JBT1:CMOS CLEAR
IPMI CODE
JBT1
MH9
MH8
MH12
DA13
DA12
1. JVRM1
2. JVRM2
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