Mitsubishi Electric MELSEC iQ-R Series Manual page 14

Accessible devices
The access target CPU modules are as follows:
Access target
(1)
(2)
(3)
(4)
(5)
: Accessible, : Not accessible
Device name (Device)
Function input (FX)
Function output (FY)
Function register (FD)
Special relay (SM)
Special register (SD)
Input relay (X)
Output relay (Y)
Internal relay (M)
Latch relay (L)
Annunciator (F)
Edge relay (V)
Link relay (B)
Data register (D)
Link register (W)
Extended internal relay (M)
Extended data register (D)
Extended link register (W)
Timer
Long timer
Counter
Long counter
Retentive timer
Long retentive timer
Link special relay (SB)
Link special register (SW)
Step relay (S)
Direct input (DX)
Direct output (DY)
Accumulator (A)
1 COMMON ITEMS
12
1.3 MELSEC iQ-R Series Data Link Functions
Accessible CPU modules
RCPU
MELSEC iQ-R series C Controller module
QCPU (Q mode)
LCPU
MELSEC-Q series C Controller module
*1
*4
*4
Contact (TS)
Coil (TC)
*5
Current value (T/TN)
Contact (LTS)
Coil (LTC)
*5
Current value (LT/LTN)
Contact (CS)
Coil (CC)
*5
Current value (C/CN)
Contact (LCS)
Coil (LCC)
Current value (LC/LCN)
*6
Contact (STS, SS )
*6
Coil (STC, SC )
Current value (ST/STN, ST/SN
Contact (LSTS)
Coil (LSTC)
Current value (LST/LSTN)
Access target
(1)




























*5



*6 *5

)


*5







(2) (3) (4)
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
  
(5)







*2




*3

*2

*3



























