Supermicro X12DPG-QR User Manual
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Supermicro X12DPG-QR User Manual

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X12DPG-QR
USER'S MANUAL
Revision 1.0a

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Summary of Contents for Supermicro X12DPG-QR

  • Page 1 X12DPG-QR USER'S MANUAL Revision 1.0a...
  • Page 2 State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
  • Page 3 32 DIMM slots and up to 8TB Intel Optane™ PMem 200 Series with speeds of up to 3200 MHz. In addition, the X12DPG-QR features superior I/O expandability, including four SATA 3.0 connections, four PCIe x16 slots for Redstone GPUs, four PCIe 4.0 x16 slots, and two PCIe M.2 ports.
  • Page 4 Super X12DPG-QR User's Manual Contacting Supermicro Headquarters Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: marketing@supermicro.com (General Information) support@supermicro.com (Technical Support) Website: www.supermicro.com Europe Address: Super Micro Computer B.V.

  • Page 5: Table Of Contents

    Preface Table of Contents Chapter 1 Introduction 1.1 Checklist ..........................7 1.2 Processor and Chipset Overview ..................16 1.3 Special Features ........................17 1.4 System Health Monitoring ....................17 1.5 ACPI Features ........................18 1.6 Power Supply ........................18 1.7 Intel® Optane™ Persistent Memory (PMem) 200 Series Overview ........19 Chapter 2 Installation 2.1 Static-Sensitive Devices .....................20 2.2 Processor and Heatsink Installation ...................21...
  • Page 6 Super X12DPG-QR User's Manual Appendix A BIOS POST Codes A.1 BIOS POST Codes ......................187 Appendix B Software B.1 Microsoft Windows OS Installation ...................188 B.2 Driver Installation ......................190 B.3 SuperDoctor 5 .........................191 ® B.4 BMC ..........................192 B.5 Logging into the BMC (Baseboard Management Controller) ...........192...

  • Page 7: Chapter 1 Introduction

    Chapter 1 Introduction Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance. 1.1 Checklist This motherboard was designed to be used in an SMCI-proprietary chassis only as a part of an integrated, complete system solution.
  • Page 8 Super X12DPG-QR User's Manual X12DPG-QR Motherboard Image Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
  • Page 9 P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B P1-PCIe2B P1-PCIe0A P1-PCIe0B P2-PCIe2A JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 FAN2 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1 BAR CODE IPMI CODE X12DPG-QR Motherboard Layout...
  • Page 10 Super X12DPG-QR User's Manual Quick Reference MH10 M.2-H SLOT2 22110 M.2-H SLOT1 22110 M.2-H1 JRK1 M.2-H2 JRK1 JWD1 JUSB1 JWD1 LED3 JUSB1 USB3 (3.0) JPWR2 JPWR1 JBT1 CMOS CLEAR JPWR2 JPWR1 GPU-PWR1 JGPU_PWR1 JGPU_PWR1 JS11 JS12 JS10 JS13 JS14 JTPM1...
  • Page 11 Chapter 1: Introduction Quick Reference Table Jumper Description Default Setting JBT1 CMOS Clear Open (Normal) JPME1 ME Manufacturing Recovery Pins 1-2 (Normal) JWD1 Watchdog Timer Pins 1-2 (Reset) JRU1 Front panel reset/UID switch selection Pins 1-2 (UID) Description Status LED3 BMC heartbeat LED Blinking Green: BMC Normal (Active) LED1...
  • Page 12 Super X12DPG-QR User's Manual Note: For details on how to configure Network Interface Card (NIC) settings, please refer to the Network Interface Card Configuration User's Guide posted on our website under the link: http://www.supermicro.com/support/manuals/.
  • Page 13 Note 2: Memory speed and capacity support depends on the processors used in the system. DIMM Size • Up to 256GB at 1.2V Note 1: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/ motherboard. Chipset • Intel PCH C621A Expansion Slots •...
  • Page 14 Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and heatsink cooling restrictions. For proper thermal management, please check the chas- sis and heatsink specifications. Note 2: For BMC configuration instructions, please refer to the Embedded BMC Con- figuration User's Guide available at http://www.supermicro.com/support/manuals/.
  • Page 15 Chapter 1: Introduction X12DPG-QR M2_A CONN M2_B CONN JS11 JS10 JS12 SlimSAS LP CONN SlimSAS LP CONN SlimSAS LP CONN SlimSAS LP CONN SlimSAS LP CONN SlimSAS LP CONN JS13 JS14 PCIe Gen3 [4..7] S-SATA Gen3 SATA G3 x1 PCIe Gen3 [8..11]...

  • Page 16: Processor And Chipset Overview

    1.2 Processor and Chipset Overview Built upon the functionality and capability of the 3rd Gen Intel Xeon Scalable Processors (Socket P+) and the Intel PCH C621A chipset, the X12DPG-QR motherboard increases energy efficiency, and system performance for a multitude of applications such as high performance computing, artificial intelligence (AI), deep learning (DL), big data, and enterprise applications.

  • Page 17: Special Features

    Chapter 1: Introduction 1.3 Special Features Recovery from AC Power Loss The Basic I/O System (BIOS) provides a setting that determines how the system will respond when AC power is lost and then restored to the system. You can choose for the system to remain powered off (in which case you must press the power switch to turn it back on), or for it to automatically return to the power-on state.

  • Page 18: Acpi Features

    It is even more important for processors that have high CPU clock rates where noisy power transmission is present. The X12DPG-QR motherboard accommodates two CRPS PSUs (JPWR1/JPWR2). Although most power supplies generally meet the specifications required by the CPU, some are inadequate.

  • Page 19: Intel® Optane™ Persistent Memory (Pmem) 200 Series Overview

    Chapter 1: Introduction 1.7 Intel® Optane™ Persistent Memory (PMem) 200 Series Overview The 3rd Gen Intel Xeon Scalable Processors support Intel Optane PMem 200 Series memory. Intel Optane PMem offers higher capacities than the traditional DDR4 modules. It also provides increased storage capabilities due to data persistence in a DDR4 form factor for higher performance computing platforms with flexible configuration options.

  • Page 20: Chapter 2 Installation

    Super X12DPG-QR User's Manual Chapter 2 Installation 2.1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your motherboard, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD.

  • Page 21: Processor And Heatsink Installation

    Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed. • Refer to the Supermicro website for updates on processor and memory support. • All graphics in this manual are for illustrations only. Your components may look different.
  • Page 22 Super X12DPG-QR User's Manual 1. The 3rd Gen Intel Xeon Scalable Processor Processor Top View (3D) CPU Key Pin 1 = Cutout = Pin 1 = CPU Key Processor Top View...
  • Page 23 Chapter 2: Installation 2. The Processor Carrier = Cutout = Pin 1 = CPU Key Carrier Bottom View...
  • Page 24 Super X12DPG-QR User's Manual 3. Heatsink Note: Exercise extreme care when handling the heatsink. Pay attention to the edges of heatsink fins which can be sharp! To avoid damaging the heatsink, please do not apply excessive force on the fins when handling the heatsink.
  • Page 25 Chapter 2: Installation Overview of the CPU Socket The CPU socket is protected by a plastic protective cover. Plastic Protective Cover CPU Socket...
  • Page 26 Super X12DPG-QR User's Manual Overview of the Processor Carrier Assembly The processor carrier assembly contains a 3rd Gen Intel Xeon Scalable processor and a processor carrier. Carefully follow the instructions given in the installation section to place a processor into the carrier to create a processor carrier.
  • Page 27 Chapter 2: Installation Overview of the Processor Heatsink Module The Processor Heatsink Module (PHM) contains a heatsink, a processor carrier, and a 3rd Gen Intel Xeon Scalable processor. 1. Heatsink (with Thermal Grease) 2. Processor Carrier 3. The 3rd Gen Intel Xeon Scalable Processor Bottom View 4.
  • Page 28 Super X12DPG-QR User's Manual Creating the Processor Carrier Assembly The processor carrier assembly contains a 3rd Gen Intel Xeon Scalable processor and a processor carrier. To create the processor carrier assembly, please follow the steps below: Note: Before installation, be sure to follow the instructions given on Page 1 and Page 2 of this chapter to properly prepare yourself for installation.
  • Page 29 Chapter 2: Installation 3. Locate the lever on the CPU socket and press the lever down as shown below. Lever 4. Using Pin 1 as a guide, carefully align the CPU keys (A and B) on the processor against the CPU keys on the carrier (a and b) as shown in the drawing below. 5.
  • Page 30 Super X12DPG-QR User's Manual Creating the Processor Heatsink Module (PHM) After creating the processor carrier assembly, please follow the instructions below to mount the processor carrier into the heatsink to form the processor heatsink module (PHM). Note: If this is a new heatsink, the thermal grease has been pre-applied on the un- derside.
  • Page 31 Chapter 2: Installation Preparing the CPU Socket for Installation This motherboard comes with a plastic protective cover installed on the CPU socket. Remove it from the socket to install the Processor Heatsink Module (PHM). Gently pull up one corner of the plastic protective cover to remove it. 1.
  • Page 32 Super X12DPG-QR User's Manual Preparing to Install the Processor Heatsink Module (PHM) into the CPU Socket After assembling the Processor Heatsink Module (PHM), you are ready to install it into the CPU socket. To ensure the proper installation, please follow the procedures below: 1.
  • Page 33 Chapter 2: Installation Installing the Processor Heatsink Module (PHM) 1. Align peek nut "A", which is next to the triangle (Pin 1) on the heatsink, against threaded fastener "a" on the CPU socket. Then align peek nuts "B", "C", and "D" on the heatsink against threaded fasteners "b", "c", and "d"...
  • Page 34 Super X12DPG-QR User's Manual Removing the Processor Heatsink Module from the CPU Socket Before removing the processor heatsink module (PHM) from the motherboard, unplug the AC power cord from all power supplies after shutting down the system. Then follow the steps below: 1.
  • Page 35 Chapter 2: Installation Removing the Processor Carrier Assembly from the Processor Heatsink Module (PHM) To remove the processor carrier assembly from the PHM, please follow the steps below: 1. Detach four plastic clips (marked a, b, c, and d) on the processor carrier assembly from the four corners of heatsink (marked A, B, C, and D) in the drawings below.
  • Page 36 Super X12DPG-QR User's Manual Removing the Processor from the Processor Carrier Assembly Once you have removed the processor carrier assembly from the PHM, you are ready to remove the processor from the processor carrier by following the steps below. 1. Unlock the lever from its locking position and push the lever upwards to disengage the processor from the processor carrier as shown in the right drawing below.

  • Page 37: Motherboard Installation

    LED3 JS1A1 JSLOT1 P1-PCIe1A P1-PCIe1B P2-PCIe1A P2-PCIe0A P1-PCIe2A P1-PCIe2B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1B P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN9 FAN2 FAN3 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...
  • Page 38 Super X12DPG-QR User's Manual Installing the Motherboard 1. Install the I/O shield into the back of the chassis, if applicable. 2. Locate the mounting holes on the motherboard. See the previous page for the location. 3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.

  • Page 39: Memory Support And Installation

    Memory Support The X12DPG-QR supports up to 8TB 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM DDR4 (288-pin) ECC memory with speeds of 3200/2933/2666 MHz in 32 memory slots and up to 8TB Intel Optane PMem 200 Series with speeds of up to 3200 MHz. (See the notes below.) Note 1: Intel®...
  • Page 40 2 CPUs & 28 DIMMs CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1/P2-DIMMB1/P2-DIMMF1/P2-DIMMD1/P2-DIMMH1/ P2-DIMMA2/P2-DIMME2/P2-DIMMC2/P2-DIMMG2 CPU1: P1-DIMMA1/P1-DIMME1/P1-DIMMC1/P1-DIMMG1/P1-DIMMB1/P1-DIMMF1/P1-DIMMD1/P1-DIMMH1/ 2 CPUs & 32 DIMMs P1-DIMMA2/P1-DIMME2/P1-DIMMC2/P1-DIMMG2/P1-DIMMB2/P1-DIMMF2/P1-DIMMD2/P1-DIMMH2 (Note) CPU2: P2-DIMMA1/P2-DIMME1/P2-DIMMC1/P2-DIMMG1/P2-DIMMB1/P2-DIMMF1/P2-DIMMD1/P2-DIMMH1/ P2-DIMMA2/P2-DIMME2/P2-DIMMC2/P2-DIMMG2/P2-DIMMB2/P2-DIMMF2/P2-DIMMD2/P2-DIMMH2 Note: This memory configuration is recommended by Supermicro for optimal memory performance. Please use this configuration to maximize your memory performance.
  • Page 41 Chapter 2: Installation Intel Optane PMem 200 Series Memory Population Table Note: Intel® Optane™ Persistent Memory (PMem) 200 Series are supported by the 3rd Gen Intel Xeon Scalable (83xx/63xx/53xx/4314 Series) Processors. PMem 200 Series Population Table for X12DP 32-DIMM Motherboards (within 1 CPU socket) DDR4+ AD Inter- Mode...
  • Page 42 Super X12DPG-QR User's Manual Validation Matrix (DDR4 DIMMS with PMem 200 Series) DIMM Capacity (GB) Ranks Per DIMM DIMM Type & Data Width DRAM Density (Stack) 16Gb 1Rx8 1Rx4 16GB 32GB RDIMM (up to 3200) 1Rx8 16GB 32GB 1Rx4 32GB...
  • Page 43 P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1B P2-PCIe0B 2. Push the release tabs outwards on both ends of the DIMM slot to unlock it. JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 BIOS LICENSE FAN2...
  • Page 44 Super X12DPG-QR User's Manual 5. Push both ends of the module straight down into the slot until the module snaps into place. 6. Press the release tabs to the lock positions to secure the DIMM module into the slot. DIMM Removal Press both release tabs on the ends of the DIMM module to unlock it.

  • Page 45: Front Control Panel

    JFP1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. See the figure below for the descriptions of the front control panel buttons and LED indicators.
  • Page 46 Super X12DPG-QR User's Manual Front Control Panel LEDs Front Control Panel (JFP1) LED Indicators Event Power (LED1) HDD (LED2) LAN (LED3/4) UID (LED5) Information (LED5) Power Fail (LED6) Power On Solid On HDD Activity Blinking NIC Activity Blinking Overheat Solid On...
  • Page 47 P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B I2C Clock Ground JRU1 Power Fail LED_P CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 BIOS LICENSE FAN2 JS15 JS16 JFP1 FAN10 FAN4...
  • Page 48 Super X12DPG-QR User's Manual Power Fail LED The Power Fail LED connection is located on pin 19 of JFP1. When this LED turns solid red, it indicates a power failure. Refer to the table below for pin definitions. UID LED The unit identifier LED connection is located on pin 3 of JFP1.
  • Page 49 Chapter 2: Installation NIC1/NIC2 (LAN1/LAN2) The NIC (Network Interface Controller) LED connections for LAN port 1 is located on pin 6 of JFP1, and LAN port 2 is on pin 5. Refer to the tables below for more information. LAN1/LAN2 LED LED States Color State...
  • Page 50 Super X12DPG-QR User's Manual FP Power LED The Front Panel Power LED connection is located on pin 9 of JFP1. HDD Activity LED The HDD activity LED connection is located on pin 7 of JFP1. When this LED is blinking green, it indicates HDD is active.

  • Page 51: Connectors

    LED3 JS1A1 JSLOT1 P1-PCIe2A P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 FAN2 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...
  • Page 52 Super X12DPG-QR User's Manual 8-Pin GPU Power Connectors Two power connectors are located at (JGPU_PWR1~2) on the motherboard to provide power to GPU devices. Refer to the table below for JGPU_PWR2 pin definitions. 12V 8-pin Power Pin Definitions Pin# Definition...
  • Page 53 LED3 JS1A1 JSLOT1 P1-PCIe2A P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 FAN2 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...
  • Page 54 Super X12DPG-QR User's Manual Headers Fan Headers There are four cooling fans (FAN1~4) used for system cooling on the motherboard. In addition, two fans (FAN9/FAN10) are used for GPU device cooling. Fan speed control is available by Thermal Management via the BMC interface. Refer to the table below for pin definitions.
  • Page 55 LED3 JS1A1 JSLOT1 P1-PCIe2A P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 FAN2 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...
  • Page 56 Super X12DPG-QR User's Manual TPM/Port 80 Header A Trusted Platform Module (TPM)/Port 80 header is located at JTPM1 to provide TPM support and Port 80 connection. Use this header to enhance system performance and data security. Refer to the table below for pin definitions. Please go to the following link for more information on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf.
  • Page 57 C) header (JNVI2C1), used for PCIe SMBus clock and data connections, provides hot-plug support via a dedicated SMBus interface. This feature is only available for a Supermicro complete system with an SMCI-proprietary NVMe add-on card and a proper cable installed. See the table below for pin definitions.
  • Page 58 Super X12DPG-QR User's Manual Chassis Intrusion Header A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to the table below for pin definitions.
  • Page 59 JRK1. Note: For detailed instructions on how to configure VROC RAID settings, please refer to the VROC RAID Configuration User's Guide posted on the web page under the link: http://www.supermicro.com/support/manuals/. VROC Key VROC RAID Key Header...
  • Page 60 Super X12DPG-QR User's Manual M.2 Slot The X12DPG-QR motherboard has two PCIe M.2 slots (M.2-H1 / M.2-H2). M.2 was formerly known as Next Generation Form Factor (NGFF) and serves to replace mini PCIe. M.2 allows for a variety of card sizes, increased functionality, and spatial efficiency. The M.2 sockets supports PCIe 3.0 x4x4 SSD cards in the 22110 form factors.
  • Page 61 LED3 JS1A1 JSLOT1 P1-PCIe2A P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 BIOS LICENSE FAN2 JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...
  • Page 62 Super X12DPG-QR User's Manual CPU VPP Bus Header for Backplane NVMe Riser Card Device The CPU VPP Bus header for the riser card is located at JNVVPP1 on the motherboard. Please refer to the layout below for the location of JNVVPP1.

  • Page 63: Jumper Settings

    Chapter 2: Installation 2.7 Jumper Settings How Jumpers Work To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2.
  • Page 64 Super X12DPG-QR User's Manual Reset Button/UID Button The UID button in conjunction with the jumper JRU1 is used for a chassis that supports a front UID button. Setting JRU1 to pin 3-4 will configure this button as a rest button to reset BMC settings.
  • Page 65 LED3 JS1A1 JSLOT1 P1-PCIe2A P1-PCIe2B P1-PCIe1A P1-PCIe1B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1A P2-PCIe1B P2-PCIe0A P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN9 FAN2 FAN3 BIOS LICENSE JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...

  • Page 66: Led Indicators

    Super X12DPG-QR User's Manual 2.8 LED Indicators BMC Heartbeat LED A BMC Heartbeat LED is located at LED3 on the motherboard. When LED3 is blinking, the BMC is functioning normally. Please refer to the table below for more information. BMC Heartbeat LED Indicator...
  • Page 67 JTPM1 JS1A1 JSLOT1 P1-PCIe1A P1-PCIe1B P2-PCIe1A P2-PCIe0A P1-PCIe2A P1-PCIe2B P1-PCIe0A P1-PCIe0B P2-PCIe2A P2-PCIe2B P2-PCIe1B P2-PCIe0B JRU1 CPU1 CPU2 X12DPG-QR REV:1.01 DESIGNED IN USA P1-PCIe3B P1-PCIe3A P2-PCIe3A P2-PCIe3B JGPU_PWR2 FAN3 FAN9 BIOS LICENSE FAN2 JS15 JS16 JFP1 FAN10 FAN1 FAN4 LED1...

  • Page 68: Chapter 3 Troubleshooting

    Super X12DPG-QR User's Manual Chapter 3 Troubleshooting 3.1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
  • Page 69 Chapter 3: Troubleshooting No Video 1. If the power is on, but you do not have video, remove all add-on cards and cables. 2. Remove all memory modules and turn on the system (if the alarm is on, check the specs of memory modules, reset the memory, or try a different one).
  • Page 70 Super X12DPG-QR User's Manual When the System Becomes Unstable A. If the system becomes unstable during or after OS installation, check the following: 1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest BIOS installed in your system.

  • Page 71: Technical Support Procedures

    Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you.

  • Page 72: Frequently Asked Questions

    BIOS revision to make sure that it is newer than your BIOS before downloading. Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.

  • Page 73: Battery Removal And Installation

    Chapter 3: Troubleshooting 3.4 Battery Removal and Installation Battery Removal To remove the onboard battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Locate the onboard battery as shown below. 3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to unlock it.

  • Page 74: Returning Merchandise For Service

    Super X12DPG-QR User's Manual 3.5 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number.

  • Page 75: Chapter 4 Uefi Bios

    UEFI BIOS 4.1 Introduction This chapter describes the AMIBIOS™ Setup utility for the X12DPG-QR motherboard. The BIOS is stored on a chip and can be easily upgraded using a flash program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.

  • Page 76: Main Setup

    Super X12DPG-QR User's Manual 4.2 Main Setup When you first enter the AMI BIOS setup utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen.
  • Page 77 Chapter 4: BIOS CPLD Version This feature displays the version of the CPLD (Complex Programmable Logic Device) used in the system. Memory Information Total Memory This feature displays the total size of memory available in the system.

  • Page 78: Advanced Setup Configurations

    Super X12DPG-QR User's Manual 4.3 Advanced Setup Configurations Use the arrow keys to select the Advanced menu and press <Enter> to access the submenu items: Warning: Take caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency, or an incorrect DRAM timing setting may cause the system to become un-...
  • Page 79 Chapter 4: BIOS Boot Feature  Quiet Boot Use this feature to select the screen between displaying POST messages or the OEM logo at bootup. Select Disabled to display the POST messages. Select Enabled to display the OEM logo instead of the normal POST messages. The options are Disabled and Enabled. Note: BIOS POST (Power-on Self Test) messages are always displayed regardless of the setting for this feature.
  • Page 80 Super X12DPG-QR User's Manual bootable disks. If this feature is set to Postponed, the ROM BIOS of the host adaptors will not capture Interrupt 19 immediately to allow the drives attached to these adaptors to function as bootable devices at bootup. The options are Immediate and Postponed.
  • Page 81 Chapter 4: BIOS CPU Configuration  Warning: Setting the wrong values in the following sections may cause the system to malfunc- tion. The following CPU information will display: • Processor BSP Revision • Processor Socket • Processor ID • Processor Frequency •...
  • Page 82 Super X12DPG-QR User's Manual CPU1 Core Disable Bitmap/CPU2 Core Disable Bitmap  The following features will display: Available Bitmap: The available Bitmap will be displayed. Core Disable Bitmap (Hex) Enter 0 to enable all CPU cores. Enter FFFFFFFFFFF to disable all CPU cores. Please note that at least one core per CPU must be enabled.
  • Page 83 Select Enable to enable Intel Trusted Execution Technology (TXT) support to enhance system security and data integrity. The options are Disable and Enable. Note: For more information on TPM, please visit our website at http://www.supermicro. com/manuals/other. VMX (Not Available when "Enable Intel® TXT" is set to Enable)
  • Page 84 Super X12DPG-QR User's Manual SGX Factory Reset (Available when TME-MT is set to Enabled and the SGX feature is supported by the CPU used in the system) Select Enabled to reset the factory default setting for SGX (Software Guard Extension). The options are Disabled and Enabled.
  • Page 85 Chapter 4: BIOS Advanced Power Management Configuration Power Technology Select Energy Efficient to support power-saving mode. Select Custom to customize system power settings. Select Disabled to disable power-saving settings. The options are Disable, Energy Efficient, and Custom. Power Performance Tuning (Available when "Power Technology" is set to Custom) Select BIOS to allow the system BIOS to configure the Power-Performance Tuning Bias setting.
  • Page 86 Super X12DPG-QR User's Manual CPU P State Control (Available when "Power Technology" is set  to Custom) SpeedStep (P-States) EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust processor voltage and core frequency to reduce power consumption and heat dissipation.
  • Page 87 Chapter 4: BIOS hardware. The options are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support. Frequency Prioritization  RAPL Prioritization Select Enable to prioritize RAPL (Running Average Power Limit) which sets the power consumption limit for a processor to save energy. The options are Enable and Disable. CPU C State Control ...
  • Page 88 Super X12DPG-QR User's Manual T-State Throttle Level (Available when "Software Controlled T-States" is set to Enable) Use this feature to configure the on-die thermal throttling setting. The options are Disable, 6.25%, 12.5%, 18.75%, 25.0%, 31.25%, 37.5%, 43.75%, 50.0%, 56.25%, 62.5%, 68.75%, 75.0%, 81.25%, 87.5%, and 93.75%.
  • Page 89 Chapter 4: BIOS Degrade Precedence Use this feature to select the degrading precedence option for Ultra Path Interconnect (UPI) connections. Select Topology Precedent to degrade UPI features if the system options are in conflict. Select Feature Precedent to degrade UPI topology if system options are in conflict.
  • Page 90 Super X12DPG-QR User's Manual Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF. SNC (Sub NUMA) Select Enable to use "Sub NUMA Clustering" (SNC), which supports full SNC (2-cluster) interleave and 1-way IMC interleave.
  • Page 91 Chapter 4: BIOS Memory Configuration STEP DRAM Test Select Enable for Samsung Test BIOS and Enhanced Post Package Repair (PPR) support. The options are Disable and Enable. *If this feature is set to Enable, the following feature will display: Operation Mode Use this feature to set the STEP DRAM test mode.
  • Page 92 Super X12DPG-QR User's Manual Erase-Arm NVDIMMs (Available when "Enabled ADR" is set to Enable, and when NVDIMMs are detected/installed in the system) If this feature is set to Enable, the function that "arms" the NVM for safe operations in the event of a power loss will be removed.
  • Page 93 Chapter 4: BIOS memory security, but it will reduce the memory capacity into half. The options are Disabled, Full Mirror Mode, and Partial Mirror Mode. Correctable Error Threshold Use this feature to enter the threshold value for correctable memory errors. The default setting is 512.
  • Page 94 Super X12DPG-QR User's Manual VMWare PMem Support Select Enabled to support VMware certification for onboard PMem memory. The options are Disabled, and Enabled. IIO Configuration  CPU1 Configuration/CPU2 Configuration  IOU0 (IIO PCIe Port 1) Use this feature to configure the PCIe Bifurcation setting for a PCIe port specified by the user.
  • Page 95 Chapter 4: BIOS Intel® VT for Directed I/O (VT-d) Intel® VT for Directed I/O Select Yes to use the Intel Virtualization Technology support for Direct I/O VT-d by reporting the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR ACPI tables.
  • Page 96 Super X12DPG-QR User's Manual P2P Completion Redirect (When "PCIe ACSCTL" is set to Enabled) Select Enabled to allow the system to determine when the component redirects peer-to- peer completions upstream. The options are Disabled and Enabled. Upstream Forwarding Enable (When "PCIe ACSCTL" is set to Enable) Select Enable to enable the component to forward upstream any requests and completions it received from another component in the lower hierarchy.
  • Page 97 Chapter 4: BIOS Intel® VMD for Volume Management Device on CPU2  VMD Configuration for IOU 0 Enable/Disable VMD Select Enable to enable Intel Volume Management Device Technology support for the root port specified by the user. The options are Disable and Enable. *If this feature is set to Enable to a port specified by the user, the following items will display: VMD Port 1A/VMD Port 1B/VMD Port 1C/VMD Port 1D Select Enable to enable Intel Volume Management Device Technology support for the root...
  • Page 98 Super X12DPG-QR User's Manual IIO eDPC (Enhanced Downstream Port Containment) Support Use this feature to configure the setting for IIO Enhanced Downstream Port Containment (eDPC) support for your system in an effort to improve the error containment capacity within the PCIe subsystem when an uncorrected error is detected either at the root port or at the switch downstream port.
  • Page 99 Chapter 4: BIOS South Bridge The following USB information will display: • USB Module Version • USB Devices Legacy USB Support Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support if there are no legacy USB devices present. Select Disable to have all USB devices available for EFI applications only.
  • Page 100 Super X12DPG-QR User's Manual PCIe PLL SSC Select Enabled for PCH PCIe Spread Spectrum Clocking support, which will allow the BIOS to monitor and attempt to reduce the level of electromagnetic interference caused by the components whenever needed. The options are Disabled and Enabled.
  • Page 101 Chapter 4: BIOS SATA Configuration  When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA devices that are supported by the Intel PCH chip and displays the following features: SATA Controller This feature enables or disables the onboard SATA controller supported by the Intel PCH chip.
  • Page 102 Super X12DPG-QR User's Manual SATA RAID Option ROM/UEFI Driver (Available when "Configure SATA as" is set to RAID) Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
  • Page 103 Chapter 4: BIOS sSATA Configuration  sSATA Controller This feature enables or disables the onboard sSATA controller supported by the Intel PCH. The options are Enable and Disable. Configure sSATA as Select AHCI to configure an sSATA drive specified by the user as an AHCI drive. Select RAID to configure an sSATA drive specified by the user as a RAID drive.
  • Page 104 Super X12DPG-QR User's Manual sSATA RAID Option ROM/UEFI Driver (Available when "Configure sSATA as" is set to RAID) Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for system boot. The options are Disable, EFI, and Legacy.
  • Page 105 Chapter 4: BIOS PCIe/PCI/PnP Configuration  The following PCI information will be displayed: PCI Bus Driver Version PCI Devices Common Settings Above 4G Decoding (Available if the system supports 64-bit PCI decoding) Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address. The options are Disabled and Enabled.
  • Page 106 Super X12DPG-QR User's Manual MMIO High Granularity Size Use this feature to select the high memory size based on memory-address mapping for the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G. Maximum Read Request Select Auto for the system BIOS to automatically set the maximum size for a read request for a PCIe device to enhance system performance.
  • Page 107 Chapter 4: BIOS Super IO Configuration Super IO Configuration Super IO Chip: AST2600  Serial Port 1 Configuration Serial Port Select Enabled to enable Serial Port 1. The options are Disabled and Enabled. Device Settings (Available when "Serial Port 1" is set to Enabled) This feature displays the base I/O port address and the Interrupt Request address of Serial Port 1.
  • Page 108 Super X12DPG-QR User's Manual Device Settings (Available when "Serial Port 2" is set to Enabled) This feature displays the base I/O port address and the Interrupt Request address of Serial Port 2. Change Settings (Available when "Serial Port 2" is set to Enabled) This feature specifies the base I/O port address and the Interrupt Request address of Serial Port 2.
  • Page 109 Chapter 4: BIOS Serial Port Console Redirection  COM 1 Console Redirection Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client machine to be connected to a host machine at a remote site for networking. The options are Disabled and Enabled.
  • Page 110 Super X12DPG-QR User's Manual Parity A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd.
  • Page 111 Chapter 4: BIOS Console Redirection Settings (for COM2/SOL)  Use this feature to specify how the host computer will exchange data with the client computer, which is the remote computer used by the user. Terminal Type Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set.
  • Page 112 Super X12DPG-QR User's Manual Recorder Mode Select Enabled to capture the data displayed on a terminal and send it as text messages to a remote server. The options are Disabled and Enabled. Resolution 100x31 Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled.
  • Page 113 Chapter 4: BIOS Console Redirection Settings (for EMS) Out-of-Band Management Port This feature selects a serial port in a client server to be used by the Windows Emergency Management Services (EMS) to communicate with a remote host server. The options are COM1 and COM2/SOL.
  • Page 114 Super X12DPG-QR User's Manual ACPI Settings  System ACPI Parameters Use this feature to configure Advanced Configuration and Power Interface (ACPI) power management settings and parameters for your system. NUMA Select Enabled to enable Non-Uniform Memory Access support to enhance system performance.
  • Page 115 Chapter 4: BIOS timestamp calculation devices such as an x86 RDTSC Instruction embedded in the CPU. The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer. The options are Disabled and Enabled. Trusted Computing (Available when a TPM device is installed ...
  • Page 116 Super X12DPG-QR User's Manual SHA-1 PCR Bank Select Enabled to enable SHA-1 PCR Bank support to enhance system integrity and data security. The options are Enabled and Disabled. SHA256 PCR Bank Select Enabled to enable SHA256 PCR Bank support to enhance system integrity and data security.
  • Page 117 Note 1: If the option for this feature (TXT Support) is set to Enabled, be sure to dis- able EV DFX (Device Function On-Hide support when it is present in the BIOS for the system to work properly Note 2: For more information on TPM, please refer to the TPM manual at http://www. supermicro.com/manuals/other.
  • Page 118 Super X12DPG-QR User's Manual Network Configuration  Network Stack Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unified Extensible Firmware Interface) for network stack support. The options are Disabled and Enabled. *If "Network Stack" is set to Enabled, the following items will display: IPv4 PXE Support Select Enabled to enable IPv4 PXE boot support.
  • Page 119 Chapter 4: BIOS PXE Boot Wait Time The user use this feature to set the wait time (in seconds) upon which the system BIOS will wait for user to press the <ESC> key to abort PXE boot instead of proceeding with PXE boot by connecting to a network server immediately.
  • Page 120 Super X12DPG-QR User's Manual HTTP Boot Configuration  HTTP Boot Policy Use this feature to set the HTTP Boot policy. The options are Apply to all LANs, Apply to Each LAN, and Boot Priority #1 instantly. HTTP Boot Checks Hostname...
  • Page 121 Chapter 4: BIOS Boot Description Use this feature to enter a boot description, which cannot be longer than 75 characters. Please be sure to enter a boot description; otherwise, the boot option for the URI cannot be created. Boot URI (Uniform Resource Identifier) Enter a Boot URI with 128 characters or shorter.
  • Page 122 Super X12DPG-QR User's Manual TLS Authentication Configuration  When this submenu is selected, the following items will display: Server CA Configuration This feature allows the user to configure the client certificate that is to be used by the server. Enroll Certification ...
  • Page 123 Chapter 4: BIOS Delete Certification  This feature is used to delete the certificate if a certificate has been enrolled in the system. Client Certification Configuration This feature allows the user to configure the client certificate to be used by the server. Enroll Certification ...
  • Page 124 Super X12DPG-QR User's Manual SMCI PMem Configuration When this submenu is selected, the following items will display: SMCI PMem Information Select this submenu and press <Enter>, the following items will display: • PMem UEFI Drive Version • All Initialized DIMMs •...
  • Page 125 Chapter 4: BIOS • DIMM [1] Serial Number • DIMM [1] FW (Firmware) Version • DIMM [1] Capacity • DIMM [1] APP Direct Capacity • DIMM [1] Unconfigured Capacity • DIMM [1] Reserved Capacity • DIMM [1] Inaccessible Capacity • DIMM [2] Handle •...
  • Page 126 Super X12DPG-QR User's Manual • DIMM [3] UID (Unit ID) • DIMM [3] Serial Number • DIMM [3] FW (Firmware) Version • DIMM [3] Capacity • DIMM [3] APP Direct Capacity • DIMM [3] Unconfigured Capacity • DIMM [3] Reserved Capacity •...
  • Page 127 Chapter 4: BIOS SMCI PMem Settings Select this submenu and press <Enter>, the following items will display: Create Goal Config (Configuration): Persistent: The default setting is [Do Nothing]. Memory Type Reserved [%] All PMem DIMMs have (the) same security state User Security Policy Use this feature to set the User Security Policy.
  • Page 128 Super X12DPG-QR User's Manual Intel® Optane™ Persistent Memory Configuration  When you select this submenu and press <Enter>, the following screen will display: Intel® Optane™ Persistent Memory Configuration  When you select this submenu and press <Enter>, the following screen will display: •...
  • Page 129 Chapter 4: BIOS DIMMs on Socket 0x0000: DIMM IO 0x0010  DIMM IO 0x0110  DIMM IO 0x0210  DIMM IO 0x0310  DIMMs on Socket 0x0001: DIMM IO 0x1010  DIMM IO 0x1110  DIMM IO 0x1210  DIMM IO 0x1310 ...
  • Page 130 Super X12DPG-QR User's Manual • Firmware Active API Version: This feature indicates the firmware API version of a PMem module. • Lock State: This feature indicates the lock state of a PMem module. • SVN Downgrade: This feature indicates the status of SVN Downgrade of a PMem module.
  • Page 131 Chapter 4: BIOS • Vendor ID • Device ID • System Vendor ID • Subsystem Vendor ID • Subsystem Device ID • Device Locator • Subsystem Revision ID • Interface Format Code • Manufacturing Information Valid • Manufacturing Date • Manufacturing Location •...
  • Page 132 Super X12DPG-QR User's Manual • Unconfigured Capacity • Inaccessible Capacity • Reserved Capacity • Avg (Average) Power Limit [mW] • Memory Bandwidth Boost Feature • Memory Bandwidth Boost Max Power Limit [mW] • Memory Bandwidth Boost Average Power Time Constant [ms] •...
  • Page 133 Chapter 4: BIOS • Thermal Throttle Loss % • Latched Last Shutdown Status • Unlatched Shutdown Status • Security Capabilities • Modes Supported • Boot Status • AIT DRAM Enabled • Error Injection Enabled • Max Controller Temperature [C] • Software Triggers Enabled [0] •...
  • Page 134 Super X12DPG-QR User's Manual Monitor Health  This submenu displays the following health information on a memory module being monitored. • Current Alarm Threshold Status Controller Temperature: (within the alarm threshold on all PM modules) • Controller Temperature: (within the alarm threshold on all PM modules).
  • Page 135 Chapter 4: BIOS Staged Firmware Version: This feature indicates the staged firmware version of a PMem module specified by the user. Update  Select this feature to update the firmware settings. Back to Main Menu  Select this feature and press <Enter> to go back to the Intel® Optane™ Persistent Memory Configuration menu.
  • Page 136 Super X12DPG-QR User's Manual Back to Main Menu  Select this feature and press <Enter> to go back to the Intel® Optane™ Persistent Memory Configuration menu. Regions  Current Configuration Region ID 1  When this submenu is selected, the following items will display: •...
  • Page 137 Chapter 4: BIOS Provisioning  This submenu configures the memory allocation goal for the onboard PMem memory modules. Create Goal Configuration  When this submenu is selected, the following items will display: Create Goal Configuration for • Use this feature to select the target to create goal configuration for the PMem modules. The options are Platform and Socket.
  • Page 138 Super X12DPG-QR User's Manual Back to Main Menu  Select this feature and press <Enter> to go back to the Intel® Optane™ Persistent Memory Configuration menu. Namespaces  This subsection allows the user to select a namespace to view the following information on...
  • Page 139 Chapter 4: BIOS Create Namespace  Use this submenu to create a namespace. The following information will display: Name Region ID This feature displays the Region ID of a PMem module. The options are 0x0001 and 0x0001. Mode Use this feature to set the Namespace mode. The options are None and Sector. Capacity Input Select Remaining to use the maximum memory capacity currently available as system memory capacity.
  • Page 140 Super X12DPG-QR User's Manual • AppDirect: This feature specifies the App. direct capacity of a PMem module. • Inaccessible: This feature specifies the capacity of the PMem module that is not acces- sible to the user. • Raw: This feature specifies the raw capacity of a PMem module.
  • Page 141 Chapter 4: BIOS Quick Diagnostics Select Enabled for the quick diagnostics test to be performed on a PMem module installed in the system when needed. The options are Enabled and Disabled. DIMM ID Select Enabled to display the DIMM ID of a PMem module upon which the diagnostic test will be performed.
  • Page 142 Super X12DPG-QR User's Manual Capacity Units This feature allows the user to view and to set the default capacity units of the selected PMem to be displayed on the screen. The options are Auto, Auto_10, B, MB, MiB, GB, GiB, TB, and TiB.
  • Page 143 Chapter 4: BIOS Intel® Ethernet Controller 10 Gigabit X540-AT2 - 3C:EC:EF:0C:52:8A Note: The IP address shown above is for illustration only; it is unique based on your network configuration. NIC Configuration Link Speed This feature displays the connection speed of a LAN port specified by the user. The options are Auto Negotiated, 10 Mbps Half, 10 Mbps Full, 100 Mbps Half, and 100 Mbps Full.
  • Page 144 Super X12DPG-QR User's Manual VLAN Configuration (MAC: 3CECEF0C528A)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings:...
  • Page 145 Chapter 4: BIOS MAC: 3CECEF0C528A - IPv6 Network Configuration  Note: The IP addresses shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type • MAC Address •...
  • Page 146 Super X12DPG-QR User's Manual MAC: 3CECEF0C528A - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 147 Chapter 4: BIOS Intel® Ethernet Controller 10 Gigabit X540-AT2 -  3C:EC:EF:0C:52:8B Note: The IP address shown above is for illustration only; it is unique based on your network configuration. NIC Configuration  Link Speed This feature displays the connection speed of a LAN port specified by the user. The options are Auto Negotiated, 10 Mbps Half, 10 Mbps Full, 100 Mbps Half, and 100 Mbps Full.
  • Page 148 Super X12DPG-QR User's Manual VLAN Configuration (MAC: 3CECEF0C528B)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings:...
  • Page 149 Chapter 4: BIOS MAC: 3CECEF0C528B - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type • MAC Address •...
  • Page 150 Super X12DPG-QR User's Manual MAC: 3CECEF0C528B - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 151 Chapter 4: BIOS Broadcom <AS 3908> Configuration Utility - 07.14.06.02  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Broadcom <AS 3908> configuration utility. For detailed information on features support by Broadcom products, please refer to Broadcom's website.
  • Page 152 Super X12DPG-QR User's Manual Mellanox Network Adapter - B8:59:9F:EE:EF:38  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Mellanox Network Adapter. For detailed infor-...
  • Page 153 Chapter 4: BIOS VLAN Configuration (MAC: B8599FEEEF38)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings: Create New VLAN VLAN ID Priority...
  • Page 154 Super X12DPG-QR User's Manual MAC: B8599FEEEF38 - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type •...
  • Page 155 Chapter 4: BIOS MAC: B8599FEEEF38 - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 156 Super X12DPG-QR User's Manual Mellanox Network Adapter - 1C:34:DA:4C:1A:62  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Mellanox Network Adapter. For detailed infor-...
  • Page 157 Chapter 4: BIOS VLAN Configuration (MAC: 1C34DA4C1A62)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings: Create New VLAN VLAN ID Priority...
  • Page 158 Super X12DPG-QR User's Manual MAC: 1C34DA4C1A62 - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type •...
  • Page 159 Chapter 4: BIOS MAC: 1C34DA4C1A62 - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 160 Super X12DPG-QR User's Manual Mellanox Network Adapter - 1C:34:DA:4C:1A:63  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Mellanox Network Adapter. For detailed infor-...
  • Page 161 Chapter 4: BIOS VLAN Configuration (MAC: 1C34DA4C1A63)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings: Create New VLAN VLAN ID Priority...
  • Page 162 Super X12DPG-QR User's Manual MAC: 1C34DA4C1A63 - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type •...
  • Page 163 Chapter 4: BIOS MAC: 1C34DA4C1A63 - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 164 Super X12DPG-QR User's Manual Mellanox Network Adapter - 1C:34:DA:4C:1A:5A  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Mellanox Network Adapter. For detailed infor-...
  • Page 165 Chapter 4: BIOS VLAN Configuration (MAC: 1C34DA4C1A5A)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings: Create New VLAN VLAN ID Priority...
  • Page 166 Super X12DPG-QR User's Manual MAC: 1C34DA4C1A5A - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type •...
  • Page 167 Chapter 4: BIOS MAC: 1C34DA4C1A5A - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 168 Super X12DPG-QR User's Manual Mellanox Network Adapter - 1C:34:DA:4C:1A:5B  Note 1: The IP address shown above is for illustration only; it is unique based on your network configuration. Note 2: This section lists the features of Mellanox Network Adapter. For detailed infor-...
  • Page 169 Chapter 4: BIOS VLAN Configuration (MAC: 1C34DA4C1A5B)  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  This feature allows the user to configure the following VLAN settings: Create New VLAN VLAN ID Priority...
  • Page 170 Super X12DPG-QR User's Manual MAC: 1C34DA4C1A5B - IPv6 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Enter Configuration Menu  • Interface Name • Interface Type •...
  • Page 171 Chapter 4: BIOS MAC: 1C34DA4C1A5B - IPv4 Network Configuration  Note: The IP address shown above is for illustration only; it is unique based on your network configuration. Configured Select Enabled to show whether the network address has been successfully configured or not.
  • Page 172 Super X12DPG-QR User's Manual Driver Health This feature displays the following health information of all drivers as detected by the BIOS: Note: The Driver Health information shown in this section is for illustration only; it is unique based on the drivers that are installed in your system and are detected by the BIOS.

  • Page 173: Event Logs

    Chapter 4: BIOS 4.4 Event Logs Use this feature to configure Event Log settings. Note: After you've made any changes on a setting below, please reboot the system for the changes you've made to take effect. Change SMBIOS Event Log Settings Enabling/Disabling Options SMBIOS Event Log Select Enabled to enable SMBIOS (System Management BIOS) Event Logging during system...
  • Page 174 Super X12DPG-QR User's Manual SMBIOS Event Log Standard Settings Log System Boot Event Select Enabled to log system boot events. The options are Enabled and Disabled. MECI (Multiple Event Count Increment) Enter the increment value for the multiple event counter. Enter a number between 1 to 255.

  • Page 175: Bmc

    Chapter 4: BIOS 4.5 BMC This submenu displays the status of the Baseboard Management Controller (BMC), and allows the user to configure the following BMC settings. • BMC Firmware Revision: This feature indicates the BMC firmware used in your system. •...
  • Page 176 Super X12DPG-QR User's Manual BMC Network Configuration  Update BMC LAN Configuration Select Yes for the BIOS to implement all IP/MAC address changes upon next system boot. The options are No and Yes. ********************************* Configure IPv4 Support ********************************* • BMC LAN Selection: This feature allows the user to select the type of the BMC LAN. The manufacturer default setting is Failover.
  • Page 177 Chapter 4: BIOS • Configuration Address Source Use this feature to select the source of the IPv4 Connection. If Static is selected, you will need to know the IP address of IPv4 connection and enter it to the system manually in the field.

  • Page 178: Security

    Super X12DPG-QR User's Manual 4.6 Security This menu allows the user to configure the following security settings for the system. Administrator Password This feature indicates if an administrator password has been installed. It also allows the user to set the administrator password which is required to enter the BIOS setup utility. The length of the password should be from 3 characters to 20 characters long.
  • Page 179 Chapter 4: BIOS SMCI Security Erase Configuration  Note: The Security Erase Configuration information shown in this section is for illustra- tion only; it depends on your system configuration. This section allows the user to configure the SMCI-proprietary Security Erase settings. When this section is selected, the following features will display: •...
  • Page 180 Super X12DPG-QR User's Manual Secure Boot  Note: For detailed instructions on how to configure Security Boot settings, please refer to the Security Boot Configuration User's Guide posted on the web page under the link: http://www.supermicro.com/support/manuals/. Secure Mode Secure Boot Select Enabled to use Secure Boot settings.
  • Page 181 Chapter 4: BIOS Reset to Setup Mode  This feature resets the system to Setup Mode. Export Secure Boot Variables  This feature exports secure boot variables to other systems. Enroll EFI Image  Use this feature to enroll EFI images. Device Guard Ready Remove 'UEFI CA' from DB (Database) ...
  • Page 182 Super X12DPG-QR User's Manual Forbidden Signatures  This feature allows the user to enter and configure a set of values to be used as Forbidden Signatures for the system. These values also indicate sizes, keys numbers, and key sources of the forbidden signatures. Select Update to update your "Forbidden Signatures". Select Append to append your "Forbidden Signatures".

  • Page 183: Boot

    Chapter 4: BIOS 4.7 Boot Use this feature to configure Boot settings. Boot Mode Select Use this feature to select the type of devices from which the system will boot. The options are Legacy, UEFI (Unified Extensible Firmware Interface), and Dual. Note: When the Boot Mode Select feature above is set to Dual, be sure to set all OPROM-related settings to Legacy.
  • Page 184 Super X12DPG-QR User's Manual  Delete Boot Option This feature allows the user to select a boot device to delete from the boot priority list. Delete Boot Option This feature allows the user to remove an EFI boot option from the boot priority list.

  • Page 185: Save & Exit

    Chapter 4: BIOS 4.8 Save & Exit Select the Save & Exit menu from the BIOS setup screen to configure the settings below. Save Options Discard Changes and Exit Select this option to exit from the BIOS setup utility without making any permanent changes to the system configuration and reboot the computer.
  • Page 186 Super X12DPG-QR User's Manual Default Options Restore Optimized Defaults This feature allows the user to restore manufacturer optimized default settings. Select this item and press <Enter> to load manufacturer optimized default settings which are intended for maximum system performance but not for maximum stability.

  • Page 187: Appendix A Bios Post Codes

    When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, a diagnostic card can be attached to the computer to read I/O port 0080h (Supermicro p/n AOC-LPC80-20). For information on AMI updates, please refer to http://www.ami.com/products/.

  • Page 188: Appendix B Software

    USB/SATA DVD drive, or a USB flash drive, or the BMC KVM console. 2. Retrieve the proper RST/RSTe driver. Go to the Supermicro web page for your motherboard and click on "Download the Latest Drivers and Utilities", select the proper driver, and copy it to a USB flash drive.
  • Page 189 Appendix B: Software 4. During Windows Setup, continue to the dialog where you select the drives on which to install Windows. If the disk you want to use is not listed, click on “Load driver” link at the bottom left corner. To load the driver, browse the USB flash drive for the proper driver files.

  • Page 190: Driver Installation

    The Supermicro website contains drivers and utilities for your system at https://www. supermicro.com/wdl/driver. Some of these must be installed, such as the chipset driver. After accessing the website, go into the CDR_Images (in the parent directory of the above link) and locate the ISO file for your motherboard. Download this file to a USB flash drive or a DVD.

  • Page 191: Superdoctor ® 5

    B.3 SuperDoctor ® The Supermicro SuperDoctor 5 is a program that functions in a command-line or web-based interface for Windows and Linux operating systems. The program monitors such system health information as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP).

  • Page 192: Bmc

    When logging in to the BMC for the first time, please use the unique password provided by Supermicro to log in. You can change the unique password to a user name and password of your choice for subsequent logins.

  • Page 193: Appendix C Standardized Warning Statements

    The following statements are industry standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.
  • Page 194 Super X12DPG-QR User's Manual Attention Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées conformément aux instructions du fabricant. ¡Advertencia! Existe peligro de explosión si la batería se reemplaza de manera incorrecta.
  • Page 195 Appendix C: Standardized Warning Statements Product Disposal Warning! Ultimate disposal of this product should be handled according to all national laws and regulations. 製品の廃棄 この製品を廃棄処分する場合、 国の関係する全ての法律 ・ 条例に従い処理する必要があります。 警告 本产品的废弃处理应根据所有国家的法律和规章进行。 警告 本產品的廢棄處理應根據所有國家的法律和規章進行。 Warnung Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes erfolgen.

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