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X12SCV-LVDS
USER'S MANUAL
Revision 1.0a

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Summary of Contents for Supermicro X12SCV-LVDS

  • Page 1 X12SCV-LVDS USER'S MANUAL Revision 1.0a...
  • Page 2 State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.
  • Page 3 The motherboard comes in a mini-ITX form factor and supports both DC12V and ATX power input. Built with the Intel W480E chipset, the X12SCV-LVDS holds a capactiy of 64GB of DDR4 Non-ECC/ECC SODIMM memory in two slots. The X12SCV-LVDS is optimized for high- performance, high-end computing platforms that address the needs of next generation server applications that require small form factor hardware.
  • Page 4 Super X12SCV-LVDS User's Manual Contacting Supermicro Headquarters Address: Super Micro Computer, Inc. 980 Rock Ave. San Jose, CA 95131 U.S.A. Tel: +1 (408) 503-8000 Fax: +1 (408) 503-8008 Email: Marketing@supermicro.com (General Information) Sales-USA@supermicro.com (Sales Inquiries) Government_Sales-USA@supermicro.com (Gov. Sales Inquiries) Support@supermicro.com (Technical Support) RMA@supermicro.com...
  • Page 5: Table Of Contents

    Preface Table of Contents Chapter 1 Introduction 1.1 Checklist ..........................8 Quick Reference .......................11 Quick Reference Table ......................12 Motherboard Features .......................14 1.2 Processor and Chipset Overview ..................17 1.3 Special Features ........................17 Recovery from AC Power Loss ..................17 1.4 System Health Monitoring ....................18 Onboard Voltage Monitors ....................18 Fan Status Monitor with Firmware Control ...............18 Environmental Temperature Control .................18...
  • Page 6 Super X12SCV-LVDS User's Manual General Guidelines for Optimizing Memory Performance ..........30 DIMM Installation ......................31 DIMM Removal .........................31 2.5 Rear I/O Ports ........................32 2.6 Front Control Panel ......................36 2.7 Connectors .........................41 Power Connections ......................41 Headers ..........................43 2.8 Jumper Settings .........................50 How Jumpers Work ......................50 2.9 LED Indicators ........................55...
  • Page 7 Preface 4.6 Security ..........................103 4.7 Boot ..........................107 4.8 Save & Exit ........................109 Appendix A BIOS Codes A.1 BIOS Error POST (Beep) Codes ..................111 A.2 Additional BIOS POST Codes ..................112 Appendix B Software B.1 Microsoft Windows OS Installation ...................113 B.2 Driver Installation ......................115 B.3 SuperDoctor 5 .........................116 ®...
  • Page 8: Chapter 1 Introduction

    Introduction Congratulations on purchasing your computer motherboard from an industry leader. Supermicro motherboards are designed to provide you with the highest standards in quality and performance. In additon to the motherboard, several important parts that are included in the retail box are listed below.
  • Page 9 Chapter 1: Introduction Figure 1-1. X12SCV-LVDS Motherboard Image Note: All graphics shown in this manual were based upon the latest PCB revision available at the time of publication of the manual. The motherboard you received may or may not look exactly the same as the graphics shown in this manual.
  • Page 10 Super X12SCV-LVDS User's Manual Figure 1-2. X12SCV-LVDS Motherboard Layout (not drawn to scale) HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 11: Quick Reference

    LAN2 LINE_OUT HDMI 1.4 USB6/7 USB4/5 HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 JSPKR1 LAN1 JMD2_SRW2 LAN2 JMD2_SRW2 JRF1 X12SCV-LVDS JRF1 JRF2 REV:1.01 JPL1 DESIGNED IN USA JRF2 SLOT7 CPU1 JPL2 JVRM1 JPAC1 W480E JMD2_SRW1 JMD2_SRW1 JPME2 JWD1 JBT1 JBT1...
  • Page 12: Quick Reference Table

    Super X12SCV-LVDS User's Manual Quick Reference Table Jumper Description Default Setting (*) JBT1 CMOS Clear Open (Normal) C1, JI SMB to PCIe Slots Enable/Disable Pins 2-3 (Disabled) JLCDPWR1 LVDS Panel VCC Power 3.3V/5V Pins 1-2 (3.3V) JPAC1 Audio Enable Pins 1-2 (Enabled)
  • Page 13 Chapter 1: Introduction Connector Description LAN1, LAN2 LAN Ports LINE_OUT HD Audio Line Out LVDS1 Low Voltage Differential Signaling (LVDS) Connector MIC_IN HD Audio Mic In MH1 - MH4 Mounting Holes SLOT7 CPU PCIe 3.0 x16 Slot USB0/1, 2/3 Front Accessible USB 2.0 Ports USB4/5, 6/7 Back Panel USB 3.2 Ports...
  • Page 14: Motherboard Features

    Supports an Intel W-1200 series, 10th Generation Core i9/i7/i5/i3 series, Pentium, and Celeron processors up to 65W in an LGA1200 socket. Note: The X12SCV-LVDS does not support the Intel 10th/11th generation processor 2M cache SKUs. These proces- sors will not boot with the latest BIOS version.
  • Page 15 Chapter 1: Introduction Motherboard Features BIOS • 128Mb AMI BIOS SPI Flash BIOS ® • ACPI 6.0, Plug and Play (PnP), riser card auto detection support, SPI dual/quad speed support, and Real Time Clock (RTC) wake up Power Management • ACPI power management •...
  • Page 16 Super X12SCV-LVDS User's Manual Figure 1-3. System Block Diagram SVID PCIe3.0_x16 IMVP8 PCIe x16 SLOT INTEL LGA1200 8.0GT/s Digital port 1 Display Port DDI 1 DDR4 (CHA) Digital port 2 DIMMA1 HDMI 1.4 DDI 2 2999MHz Digital port 3 HDMI 2.0...
  • Page 17: Processor And Chipset Overview

    With the support of the new Intel Microarchitecture 14nm Process Technology, the X12SCV-LVDS dramatically increases system performance for a multitude of medical and automation applications. The Intel PCH W480E chipset support the following features: •...
  • Page 18: System Health Monitoring

    Super X12SCV-LVDS User's Manual 1.4 System Health Monitoring This section describes the health monitoring features of the motherboard. The motherboard has an onboard System Hardware Monitoring chip that supports system health monitoring. Onboard Voltage Monitors An onboard voltage monitor will scan the voltages of the onboard chipset, memory, CPU, and battery continuously.
  • Page 19: Acpi Features

    12V 8-pin power connection is also required to ensure adequate power supply to the system. Note 1: The X12SCV-LVDS motherboard alternatively supports an 8-pin 12V DC input power supply at JPV1 for embedded applications. The 12V DC input is limited to 30A by design.
  • Page 20: Serial Port

    Super X12SCV-LVDS User's Manual 1.7 Serial Port The Super I/O (NCT5525D) provides high-speed, 16550 compatible serial communication ports (UART), which support serial infrared communication. The UART includes send/receive FIFO, a programmable baud rate generator, complete modem control capability, and a processor interrupt system.
  • Page 21: Chapter 2 Installation

    Chapter 2: Installation Chapter 2 Installation 2.1 Static-Sensitive Devices Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your system board, it is important to handle it very carefully. The following measures are generally sufficient to protect your equipment from ESD. Precautions •...
  • Page 22: Processor And Heatsink Installation

    Thermal grease is pre-applied on a new heatsink. No additional thermal grease is needed. • Refer to the Supermicro website for updates on processor support. • All graphics in this manual are for illustrations only. Your components may look different.
  • Page 23 Chapter 2: Installation 2. Gently lift the load lever to open the load plate. Remove the plastic protective cover. Do not touch the CPU socket contacts. 3. Locate the triangle on the CPU and CPU socket, which indicates the location of Pin 1. Holding the CPU by the edges with your thumb and index finger, align the triangle on the CPU with the triangle on the socket.
  • Page 24: Installing An Active Cpu Heatsink With Fan

    Super X12SCV-LVDS User's Manual 5. Close the load plate, then gently push down the load lever into its locking position. CPU properly installed Load lever locked into place Note: You can only install the CPU in one direction. Make sure it is properly inserted into the socket before closing the load plate.
  • Page 25 Chapter 2: Installation 6. Align the four heatsink fasteners with the mounting holes on the motherboard. Gently push down the fasteners in a diagonal order (Example: #1 and #2, then #3 and #4) into the mounting holes until you hear a click. Then lock the fasteners by turning each one 90°...
  • Page 26: Removing The Heatsink

    Super X12SCV-LVDS User's Manual Removing the Heatsink Note: We do not recommend that the CPU or heatsink be removed. However, if you do need to remove the heatsink, please follow the instructions below to remove the heatsink and prevent damage done to the CPU or other components.
  • Page 27: Motherboard Installation

    Tools Needed Phillips Phillips Screws Standoffs (4) Screwdriver Only if Needed HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 JRF2 DESIGNED IN USA CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H LVDS1...
  • Page 28: Installing The Motherboard

    Super X12SCV-LVDS User's Manual Installing the Motherboard 1. Install the I/O shield into the back of the chassis, if applicable. 2. Locate the mounting holes on the motherboard. See the previous page for the location. 3. Locate the matching mounting holes on the chassis. Align the mounting holes on the motherboard against the mounting holes on the chassis.
  • Page 29: Memory Support And Installation

    Memory Support The X12SCV-LVDS supports up to 64GB of Non-ECC/ECC DDR4 SODIMM memory with speeds of up to 2933MHz in two memory slots. Refer to the tables below for the recommended DIMM population order and additional memory information.
  • Page 30: General Guidelines For Optimizing Memory Performance

    Super X12SCV-LVDS User's Manual General Guidelines for Optimizing Memory Performance • The blue slots must be populated first. DIMM slots must be populated in the following order: DIMMA1, DIMMB1. • It is recommended to use DDR4 memory of the same type, size, and speed.
  • Page 31: Dimm Installation

    Chapter 2: Installation DIMM Installation 1. Install the desired number of SODIMMs into the memory slots, starting with DIMMA1 and then DIMMB1. 2. Align the key on the bottom of the SODIMM module against the receptive point on the memory slot. Take note of the notches on the side of the DIMM module and of the locking clips on the socket to avoid causing damage.
  • Page 32: Rear I/O Ports

    Super X12SCV-LVDS User's Manual 2.5 Rear I/O Ports See Figure 2-1 below for the locations and descriptions of the various I/O ports on the rear of the motherboard. HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01...
  • Page 33 HD Graphics digital output with resolution up to 4096x2304 at 60Hz Refresh Rate. 1. HDMI 2.0 2. DP HDMI MIC_IN LINE_OUT 3. HDMI 1.4 USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 34 Super X12SCV-LVDS User's Manual LAN Ports Two Gigabit Ethernet ports (LAN1/2) are located on the I/O back panel. All of these ports accept RJ45 cables. Refer to the table below for pin definitions. LAN Port Pin Definition Pin# Definition Pin#...
  • Page 35 VBUS1 VBUS2 1. USB0/1 2. USB2/3 HDMI MIC_IN LINE_OUT 3. USB4/5 (3.2) USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 4. USB6/7 (3.2) X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 36: Front Control Panel

    JF1 contains header pins for various buttons and indicators that are normally located on a control panel at the front of the chassis. These connectors are designed specifically for use with Supermicro chassis. See the figure below for the descriptions of the front control panel buttons and LED indicators.
  • Page 37 Chapter 2: Installation Power Button The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both pins will power on/off the system. This button can also be configured to function as a suspend button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system is in suspend mode, press the button for 4 seconds or longer.
  • Page 38 Super X12SCV-LVDS User's Manual Overheat (OH)/Fan Fail Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan Fail LED connections. The LED on pin 8 provides warnings of overheating or fan failure.
  • Page 39 Chapter 2: Installation HDD LED The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to show hard drive activity status. Refer to the table below for pin definitions. HDD LED Pin Definitions (JF1) Pins Definition...
  • Page 40 Super X12SCV-LVDS User's Manual NMI Button The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer to the table below for pin definitions. NMI Button Pin Definitions (JF1) Pins Definition Control Ground 1. NMI...
  • Page 41: Connectors

    Res (NC) PWR_OK 5VSB +12V +12V Ground +3.3V 1. ATX Power HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H LVDS1 (PCIe/SATA)
  • Page 42 Super X12SCV-LVDS User's Manual BAR CODE JLCDPWR1 MAC CODE USB2/3 I-SATA1 DIMMA1 JBT1 I-SATA2 8-Pin Power Connector JMD1_SRW1 DIMMB1 JPV1 is an 8-pin 12V DC power input for CPU or alternative single power source for a special enclosure when the 24-pin ATX power is not in use. Refer to the table below for pin definitions.
  • Page 43: Headers

    Intrusion Input Ground 1. FAN1 2. FAN2 HDMI MIC_IN LINE_OUT 3. FANA USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 4. Chassis Intrusion X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 44 Super X12SCV-LVDS User's Manual USB0/1 USB2/3 I-SATA1 General Purpose I/O Header I-SATA2 The JGP1 (General Purpose Input/Output) header is a general purpose I/O expander on a pin header via the SMBus. Each pin can be configured to be an input pin or output pin in 2.54mm pitch.
  • Page 45 Port 80 connection. Use this header to enhance system performance and data security. Refer to the table below for pin definitions. Please go to the following link for more information on the TPM: http://www.supermicro.com/manuals/other/TPM.pdf. Trusted Platform Module Header Pin Definitions...
  • Page 46 Super X12SCV-LVDS User's Manual LVDS Connector LVDS1 is the LVDS connector. Low-voltage Differential Signaling (LVDS) is a high-speed digital interface that operates at low power. It is a type of connection that is mostly used with monitors. LVDS Connector Pin Definitions...
  • Page 47 PCIe 3.0 x4 device in the 2242 and 2280 form factors. 1. I-SATA0 2. I-SATA1 HDMI MIC_IN LINE_OUT 3. M.2 Slot JMD1 USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 4. M.2 Slot JMD2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 48 Super X12SCV-LVDS User's Manual Buzzer On the JD1 header, pins 1-4 are for the buzzer. If you wish to use an external speaker, connect its cable to this header. Buzzer Pin Definitions Pin # Definition Buzzer Internal Speaker The Internal Speaker (JSPKR1) is used to provide audible indications for various beep codes.
  • Page 49 Chapter 2: Installation COM Header The motherboard has one COM header that provides two serial connections (COM1/2) and supports RS-232 function, utilizing Supermicro PN: CBL-CDAT-0604 or CBL-CUSB-0984 (not included). COM Header (COM1/2) Pin Definitions Pin# Definition Pin# Definition DCDA DSRA...
  • Page 50: Jumper Settings

    Super X12SCV-LVDS User's Manual 2.8 Jumper Settings How Jumpers Work To modify the operation of the motherboard, jumpers can be used to choose between optional settings. Jumpers create shorts between two pins to change the function of the connector. Pin 1 is identified with a square solder pad on the printed circuit board. See the diagram below for an example of jumping pins 1 and 2.
  • Page 51 Enabled Pins 2-3 Disabled (Default) 1. Watch Dog Timer 2. TPM Enable HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 52 Super X12SCV-LVDS User's Manual LAN1/LAN2 Enable/Disable Use jumper JPL1 to enable or disable LAN port 1 and JPL2 to enable or disable LAN port 2. LAN1/2 Enable/Disable Jumper Settings Jumper Setting Definition Pins 1-2 Enabled (Default) Pins 2-3 Disabled Front Panel Audio Enable JPAC1 allows you to enable or disable the onboard audio support.
  • Page 53 Normal (Default) Pins 2-3 Manufacturing Mode 1. LVDS Power Voltage 2. Manufacturing Mode HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H...
  • Page 54 Super X12SCV-LVDS User's Manual Slot7 PCIe Bifurcation Use JRF1 and JRF2 to adjust the PCIe lane options on Slot 7 expansion slot. The options are x16, x8x8, or x8x4x4. PCIe Bifurcation Jumper Settings JRF1 JRF2 Pins 1-2 Pins 1-2 x16 (Default)
  • Page 55: Led Indicators

    Green Flashing Active Yellow/Amber 1Gbps 1. LAN1 LED 2. LAN2 LED HDMI MIC_IN LINE_OUT USB4/5 USB6/7 HDMI2.0 JSPKR1 LAN1 JMD2_SRW2 LAN2 X12SCV-LVDS JRF1 REV:1.01 DESIGNED IN USA JRF2 CPU1 JVRM1 W480E JMD2_SRW1 JBT1 JMD1_SRW1 JMD2 JMD1 M.2-P (PCIe) M.2-H LVDS1...
  • Page 56 Super X12SCV-LVDS User's Manual Power LED LED1 is the Power LED. When this LED is lit, it means power is present on the motherboard. In suspend mode, this LED will blink on and off. Be sure to turn off the system and unplug the power cord(s) before removing or installing components.
  • Page 57: Chapter 3 Troubleshooting

    Chapter 3: Troubleshooting Chapter 3 Troubleshooting 3.1 Troubleshooting Procedures Use the following procedures to troubleshoot your system. If you have followed all of the procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/ or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC power cord before adding, changing or installing any non hot-swap hardware components.
  • Page 58: No Video

    Super X12SCV-LVDS User's Manual No Video 1. If the power is on, but you have no video, remove all add-on cards and cables. 2. Use the speaker to determine if any beep codes are present. Refer to Appendix A for details on beep codes.
  • Page 59: Losing The System's Setup Configuration

    Chapter 3: Troubleshooting Losing the System's Setup Configuration 1. Make sure that you are using a high-quality power supply. A poor-quality power supply may cause the system to lose the CMOS setup information. Refer to Chapter 2 for details on recommended power supplies. 2.
  • Page 60 Super X12SCV-LVDS User's Manual 3. Use the minimum configuration for troubleshooting: Remove all unnecessary components (starting with add-on cards first), and use the minimum configuration (but with the CPU and a memory module installed) to identify the trouble areas. Refer to the steps listed in Section A above for proper troubleshooting procedures.
  • Page 61: Technical Support Procedures

    Before contacting Technical Support, please take the following steps. Also, please note that as a motherboard manufacturer, Supermicro also sells motherboards through its channels, so it is best to first check with your distributor or reseller for troubleshooting services. They should know of any possible problems with the specific system configuration that was sold to you.
  • Page 62: Frequently Asked Questions

    Warning: Do not shut down or reset the system while updating the BIOS to prevent possible system boot failure! Note: The SPI BIOS chip used on this motherboard cannot be removed. Send your motherboard back to our RMA Department at Supermicro for repair. For BIOS Recovery instructions, please refer to the AMI BIOS Recovery Instructions posted at http://www.
  • Page 63: Battery Removal And Installation

    Chapter 3: Troubleshooting 3.4 Battery Removal and Installation Battery Removal To remove the battery, follow the steps below: 1. Power off your system and unplug your power cable. 2. Remove the battery cable at the BT1 connector on the board. 3.
  • Page 64: Returning Merchandise For Service

    Super X12SCV-LVDS User's Manual 3.5 Returning Merchandise for Service A receipt or copy of your invoice marked with the date of purchase is required before any warranty service will be rendered. You can obtain service by calling your vendor for a Returned Merchandise Authorization (RMA) number.
  • Page 65: Chapter 4 Uefi Bios

    Chapter 4: BIOS Chapter 4 UEFI BIOS 4.1 Introduction This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored on a chip and can be easily upgraded using a flash program. Note: Due to periodic changes to the BIOS, some settings may have been added or deleted and might not yet be recorded in this manual.
  • Page 66: Main Setup

    Super X12SCV-LVDS User's Manual 4.2 Main Setup When you first enter the AMI BIOS setup utility, you will enter the Main setup screen. You can always return to the Main setup screen by selecting the Main tab on the top of the screen.
  • Page 67 Chapter 4: BIOS Memory Information Total Memory This feature displays the total size of memory available in the system.
  • Page 68: Advanced Setup Configurations

    Super X12SCV-LVDS User's Manual 4.3 Advanced Setup Configurations Use the arrow keys to select the Advanced menu and press <Enter> to access the menu features. Warning: Take caution when changing the Advanced settings. An incorrect value, a very high DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When this occurs, revert to default manufacturer settings.
  • Page 69 Chapter 4: BIOS High Precision Event Timer Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing multimedia streams, providing smooth playback and reducing the dependency on other timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
  • Page 70 Super X12SCV-LVDS User's Manual Re-try Boot If this feature is enabled, the BIOS will automatically reboot the system from a specified boot device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot. Power Configuration Watch Dog Function If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on jumper settings when it is expired for more than five minutes.
  • Page 71 Chapter 4: BIOS • 64-bit • EIST Technology • CPU C3 state • CPU C6 state • CPU C7 state • CPU C8 state • CPU C9 state • CPU C10 state • L1 Data Cache • L1 Instruction Cache •...
  • Page 72 Super X12SCV-LVDS User's Manual Active Processor Cores This feature determines how many CPU cores will be activated for each CPU. When all is selected, all cores in the CPU will be activated. The options are All and 1, 2, 3, 4, 5, 6, 7, 8, and 9.
  • Page 73 Chapter 4: BIOS C-States Use this feature to enable the C-State of the CPU. The options are Disabled and Enabled. Enhanced C-states Use this feature to enable the enhanced C-State of the CPU. The options are Disabled and Enabled. C-State Auto Demotion Use this feature to prevent unnecessary excursions into the C-states to improve latency.
  • Page 74 Super X12SCV-LVDS User's Manual • SA PCIe Code Version: 7.0.53.66 • VT-d: Supported Memory Configuration  Memory Configuration • Memory RC Version • Memory Frequency • Memory Timing (tCL-tRCD-tRP-tRAS) • DIMMA1 • DIMMA2 • DIMMB1 • DIMMB2 Maximum Memory Frequency Use this feature to set the maximum memory frequency for onboard memory modules.
  • Page 75 Chapter 4: BIOS Memory Remap Use this feature to enable or disable memory remap above 4GB. The options are En- abled and Disabled. MRC Fast Boot Use this feature to enable or disable fast path through the memory reference code. The options are Disabled and Enabled.
  • Page 76 Super X12SCV-LVDS User's Manual DVMT Pre-Allocated Dynamic Video Memory Technology (DVMT) allows dynamic allocation of system memory to be used for video devices to ensure best use of available system memory based on the DVMT 5.0 platform. The options are 0M, 32M, 64M, 4M, 8M, 12M, 16M, 20M, 24M, 28M, 32M/F7, 36M, 40M, 44M, 48M, 52M, 56M, and 60M.
  • Page 77 Chapter 4: BIOS PEG Configuration  CPU SLOT7 PCI-E 3.0 X16 Enable Root Port Use this feature to enable or disable the PCI Express Graphics (PEG) device in the port specified by the user. The options are Disabled, Enabled, and Auto. Max Link Speed Use this feature to select PCI-E support for the device installed on SLOT7.
  • Page 78 Super X12SCV-LVDS User's Manual PCH-IO Configuration PCH-IO Configuration • PCH SKU Name • Stepping PCI Express Configuration  DMI Link ASPM Control Use this feature to set the ASPM (Active State Power Management) state on the SA (System Agent) side of the DMI Link. The options are Disabled, L0s, L1, L0sL1, and Auto.
  • Page 79 Chapter 4: BIOS PTN3460 Switch  LVDS Panel Support Use this feature to select the supported IGFX graphics device ouput to the LVDS panel. The options are Disabled, Onboard EDID, and Offboard EDID. Panel select Use this feature to select the panel resolution. The options are 800x600, 1024x600, 1024x768, 1280x1024, 1366x768, 1440x900, 1440x1050, 1600x900, 1680x1050, 1920x1080, 1920x1200, PTN3460 EDID1, PTN3460 EDID2, PTN3460 EDID3, PTN3460 EDID4, PTN3460 EDID5, PTN3460 EDID6, PTN3460 EDID7, and Replaceable EDID From BIOS.
  • Page 80 Super X12SCV-LVDS User's Manual Priority of HTTP Boot Instance of Priority 1: Enter a value to set the rank target port. The default is 1. Select IPv4 or IPv6 Use this feature to select the targeted LAN port to boot from. The options are IPv4 and IPv6.
  • Page 81 Chapter 4: BIOS Serial Port 2 Configuration Serial Port 2 Select Enabled to enable the selected onboard serial port. The options are Disabled and Enabled. Device Settings This feature displays the status of a serial port specified by the user. Change Settings This feature specifies the base I/O port address and the Interrupt Request address of a serial port specified by the user.
  • Page 82 Super X12SCV-LVDS User's Manual Route Table Gateway addresses DNS addresses Interface ID This feature shows the interface ID for the specified network device. DAD Transmit Count This feature sends Neighbor Solicitation messages while performing a Duplicate Address Detection (DAD) to make sure there is no IP address duplication. A value of zero means a DAD has not been perfromed.
  • Page 83 Chapter 4: BIOS CIRCA Configuration  Activate Remote Assistance Process Use this feature to activate Remote Assistance. Enabling this feature will also trigger the CIRCA boot. The options are Disabled and Enabled. *If the feature above is set to Enabled, the feature below will be available for con- figuration: CIRCA Timeout Use this feature to set the timeout value for MPS connection.
  • Page 84 Super X12SCV-LVDS User's Manual OEM Flags Settings  MEBx hotkey Pressed Use this feature to specify whether the MEBx hotkey should be enabled during the system boot. The options are Disabled and Enabled. MEBx Selection Screen Use this feature to select the type of MEBx selection screen. Press 1 to enter the ME Configuration screen and 2 to initiate a remote connection.
  • Page 85 Chapter 4: BIOS PCIe/PCI/PnP Configuration  Option ROM execution Video Use this feature to select the execution of the video OpROM. The options are Do not launch, and EFI. PCI PERR/SERR Support Use this feature to enable or disable the runtime event for PCI errors. The options are Disabled and Enabled.
  • Page 86 Super X12SCV-LVDS User's Manual PCIe M.2-P OPROM Use this feature to select which firmware type to be loaded for the add-on card in this slot. The options are Disabled and EFI. Onboard LAN1 Option ROM Use this feature to select which firmware function to be loaded for LAN Port1 used for system boot.
  • Page 87 Chapter 4: BIOS *If the feature above is set to Intel RST Premium With Intel Optane System Acceleration, the next four features will be available for configuration. If the feature is set to AHCI, then only Aggressive LPM Support will be available for configuration. SATA Interrupt Selection Use this feature to select the SATA interrupt.
  • Page 88 Super X12SCV-LVDS User's Manual Serial Port Console Redirection  COM1 Console Redirection Select Enabled to enable console redirection support for a serial port specified by the user. The options are Enabled and Disabled. *If the feature above is set to Enabled, the following features will be available for configuration: COM1 Console Redirection Settings...
  • Page 89 Chapter 4: BIOS COM1 Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None and Hardware RTS/CTS.
  • Page 90 Super X12SCV-LVDS User's Manual COM2 Terminal Type Use this feature to select the target terminal emulation type for Console Redirection. Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use UTF8 encoding to map Unicode characters into one or more bytes.
  • Page 91 Chapter 4: BIOS COM2 Resolution 100x31 Select Enabled for extended-terminal resolution support. The options are Disabled and Enabled. COM2 Legacy OS Redirection Resolution Use this feature to select the number of rows and columns used in Console Redirection for legacy OS support. The options are 80x24 and 80x25. COM2 Putty KeyPad This feature selects Function Keys and KeyPad settings for Putty, which is a terminal emulator designed for the Windows OS.
  • Page 92 Super X12SCV-LVDS User's Manual AMT SOL Parity A parity bit can be sent along with regular data bits to detect data transmission errors. Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select Odd if the parity bit is set to 0, and the number of 1's in data bits is odd.
  • Page 93 Chapter 4: BIOS AMT SOL Redirection After BIOS POST Use this feature to enable or disable legacy Console Redirection after BIOS POST. When set to Bootloader, legacy Console Redirection is disabled before booting the OS. When set to Always Enable, legacy Console Redirection remains enabled when booting the OS. The options are Always Enable and Bootloader.
  • Page 94 Super X12SCV-LVDS User's Manual Flow Control Use this feature to set the flow control for Console Redirection to prevent data loss caused by buffer overflow. Send a "Stop" signal to stop sending data when the receiving buffer is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The options are None, Hardware RTS/CTS, and Software Xon/Xoff.
  • Page 95 Chapter 4: BIOS Platform Hierarchy Use this feature to disable or enable platform hierarchy for platform protection. The options are Disabled and Enabled. Storage Hierarchy Use this feature to disable or enable storage hieararchy for cryptographic protection. The options are Disabled and Enabled. Endorsement Hierarchy Use this feature to disable or enable endorsement hierarchy for privacy control.
  • Page 96 Super X12SCV-LVDS User's Manual iSCSI Configuration  Attempt Priority Attempt Priority Use this feature to set the attempt priorities. The options are Host Attempt, Redfish Attempt, and Rsd Attempt. Commit Changes and Exit Select this item to save the changes and exit.
  • Page 97 Chapter 4: BIOS Adapter PBA Device Name Chip Type PCI Device ID PCI Address Link Status MAC Address Virtual MAC Address Intel(R) Ethernet Connection (11) I219-LM - 3C:EC:EF:FC:E6:90  PORT CONFIGURATION INFORMATION UEFI Driver Adpater PBA PCI Device ID PCI Address MAC Address Driver Health ...
  • Page 98: Event Logs

    Super X12SCV-LVDS User's Manual 4.4 Event Logs Use this menu to configure Event Log settings. Change SMBIOS Event Log Settings Enabling/Disabling Options SMBIOS Event Log Change this feature to enable or disable all features of the SMBIOS Event Logging during system boot.
  • Page 99 Chapter 4: BIOS Log System Boot Event This option toggles the System Boot Event logging to enabled or disabled. The options are Disabled and Enabled. MECI The Multiple Event Count Increment (MECI) counter counts the number of occurences that a duplicate event must happen before the MECI counter is incremented. This is a numeric value.
  • Page 100: Thermal & Fan

    Super X12SCV-LVDS User's Manual 4.5 Thermal & Fan Use this menu to view System Health settings. System Health • System Temperature • CPU Temperature • System Temperature • Peripheral Temperature • PCH Temperature • SYS FAN1 • SYS FAN2 •...
  • Page 101 Chapter 4: BIOS • 3.3VCC • VBAT Fan Control Fan Control Setting Hard Drive Security Frozen Use this feature to select the fan speed control mode. The options are Quiet, Stable, Full Speed, and Customize. • SYS FAN1 and SYS FAN2 CONTROL •...
  • Page 102 Super X12SCV-LVDS User's Manual • Temperature 4 • PWM4...
  • Page 103: Security

    Use this feature to set a password for the HDD or M.2 device. The options are Disable, Set Password, Security Erase - Password, and Security Erase - Without Password Password Use this feature to set a password for the Supermicro HDD security function.
  • Page 104 Super X12SCV-LVDS User's Manual Hard Drive Security Frozen Use this feature to enable or disable the BIOS security frozen command for SATA and NVMe devices. The options are Enabled and Disabled. Password Check Select Setup for the system to check for a password at Setup. Select Always for the system to check for a password at bootup or upon entering the BIOS Setup utility.
  • Page 105 Chapter 4: BIOS  Export Secure Boot variables This feature allows you to copy NVRAM content of Secure boot variables to files in a root folder on a file system device. The options are Yes and No.  Enroll EFI Image This feature allows the image to run in Secure Boot Mode.
  • Page 106 Super X12SCV-LVDS User's Manual  Authorized Signatures Update Select Yes to load the factory default DB.' Select No to load the DB from a external file. The options are Yes and No. Append Select Yes to add the database from the manufacturer's defaults to the existing DB.
  • Page 107: Boot

    Chapter 4: BIOS 4.7 Boot Use this menu to configure Boot settings. • Boot Option #1 • Boot Option #2 • Boot Option #3 • Boot Option #4 • Boot Option #5 • Boot Option #6 • Boot Option #7 •...
  • Page 108 Super X12SCV-LVDS User's Manual Delete Boot Option Use this item to remove an EFI boot option from the boot priority list. UEFI NETWORK Drive BBS Priorities  This feature sets the system boot order of detected devices. UEFI Application Boot Priorities ...
  • Page 109: Save & Exit

    Chapter 4: BIOS 4.8 Save & Exit Use this menu to save settings and exit from the BIOS. Save Options Discard Changes and Exit Select this option to quit the BIOS Setup without making any permanent changes to the system configuration, and reboot the computer. Select Discard Changes and Exit from the Save &...
  • Page 110 Super X12SCV-LVDS User's Manual Default Options Load Optimized Default To set this feature, select Restore Defaults from the Save & Exit menu and press <Enter>. These are factory settings designed for maximum system stability, but not for maximum performance. Save As User Defaults To set this feature, select Save as User Defaults from the Save &...
  • Page 111: Appendix A Bios Codes

    Appendix A: BIOS Codes Appendix A BIOS Codes A.1 BIOS Error POST (Beep) Codes During the POST (Power-On Self-Test) routines, which are performed each time the system is powered on, errors may occur. Non-fatal errors are those which, in most cases, allow the system to continue the boot-up process.
  • Page 112: Additional Bios Post Codes

    When BIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, a diagnostic card can be attached to the computer to read I/O port 0080h (Supermicro p/n AOC-LPC80-20). For information on AMI updates, please refer to http://www.ami.com/products/.
  • Page 113: Appendix B Software

    1. Create a method to access the MS Windows installation ISO file. That can be a USB flash or media drive. 2. Retrieve the proper RST/RSTe driver. Go to the Supermicro web page for your motherboard and click on "Download the Latest Drivers and Utilities", select the proper driver, and copy it to a USB flash drive.
  • Page 114 Super X12SCV-LVDSUser's Manual 4. During Windows Setup, continue to the dialog where you select the drives on which to install Windows. If the disk you want to use is not listed, click on “Load driver” link at the bottom left corner. Figure B-2.
  • Page 115: Driver Installation

    The Supermicro website contains drivers and utilities for your system at https://www. supermicro.com/wdl/driver. Some of these must be installed, such as the chipset driver. After accessing the website, go into the CDR_Images (in the parent directory of the above link) and locate the ISO file for your motherboard. Download this file to a USB flash drive or a DVD.
  • Page 116: Superdoctor ® 5

    B.3 SuperDoctor ® The Supermicro SuperDoctor 5 is a program that functions in a command-line or web-based interface for Windows and Linux operating systems. The program monitors such system health information as CPU temperature, system voltages, system power consumption, fan speed, and provides alerts via email or Simple Network Management Protocol (SNMP).
  • Page 117: Appendix C Standardized Warning Statements

    The following statements are industry standard warnings, provided to warn the user of situations which have the potential for bodily injury. Should you have questions or experience difficulty, contact Supermicro's Technical Support department for assistance. Only certified technicians should attempt to install or configure components.
  • Page 118 Super X12SCV-LVDS User's Manual Attention Danger d'explosion si la pile n'est pas remplacée correctement. Ne la remplacer que par une pile de type semblable ou équivalent, recommandée par le fabricant. Jeter les piles usagées conformément aux instructions du fabricant. ¡Advertencia! Existe peligro de explosión si la batería se reemplaza de manera incorrecta.
  • Page 119 Appendix C: Standardized Warning Statements Product Disposal Warning! Ultimate disposal of this product should be handled according to all national laws and regulations. 製品の廃棄 この製品を廃棄処分する場合、 国の関係する全ての法律 ・ 条例に従い処理する必要があります。 警告 本产品的废弃处理应根据所有国家的法律和规章进行。 警告 本產品的廢棄處理應根據所有國家的法律和規章進行。 Warnung Die Entsorgung dieses Produkts sollte gemäß allen Bestimmungen und Gesetzen des Landes erfolgen.
  • Page 120: Appendix D Uefi Bios Recovery

    Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue. Flashing the wrong BIOS can cause irreparable damage to the system. In no event shall Supermicro be liable for direct, indirect, special, incidental, or consequential damages arising from a BIOS update. If you need to update the BIOS, do not shut down or reset the system while the BIOS is updating to avoid possible boot failure.
  • Page 121: Recovering The Bios Block With A Usb Device

    USB flash or media drive. Note 1: If you cannot locate the "Super.ROM" file in your driver disk, visit our website www.supermicro.com to download the BIOS package. Extract the BIOS binary im- age into a USB flash device and rename it "Super.ROM" for the BIOS recovery use.
  • Page 122 Super X12SCV-LVDS User's Manual Note 2: Before recovering the main BIOS image, confirm that the "Super.ROM" bi- nary image file you download is the same version or a close version meant for your motherboard. 2. Insert the USB device that contains the new BIOS image ("Super.ROM") into your USB port and reset the system until the following screen appears: 3.
  • Page 123 Appendix D: UEFI BIOS Recovery 4. When the screen as shown above displays, use the arrow keys to select the item "Proceed with flash update" and press the <Enter> key. You will see the BIOS recovery progress as shown in the screen below: Note: Do not interrupt the BIOS flashing process until it has completed.
  • Page 124 Super X12SCV-LVDS User's Manual 8. When the UEFI Shell prompt appears, type fs# to change the device directory path. Go to the directory that contains the BIOS package you extracted earlier from Step 6. Enter flash.nsh BIOSname.### at the prompt to start the BIOS update process.

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