Analog Devices AD9396 Manual page 14

AD9396
Power Management
The AD9396 uses the activity detect circuits, the active interface
bits in the serial bus, the active interface override bits, the
power-down bit, and the power-down pin to determine the
correct power state. There are four power states: full-power,
seek mode, auto power-down, and power-down.
Table 8 summarizes how the AD9396 determines the power
mode and the circuitry that is powered on/off in each of these
modes. The power-down command has priority and then the
automatic circuitry. The power-down pin (Pin 81—polarity set
Table 8. Power-Down Mode Descriptions
Mode Power-Down
Full Power 1
Seek Mode 1
Seek Mode 1
Power-Down 0
1
Power-down is controlled via Bit 0 in Serial Bus Register 0x26.
2 Sync detect is determined by OR'ing Bit 7 to Bit 2 in Serial Bus Register 0x15.
3
Auto power-down is controlled via Bit 7 in Serial Bus Register 0x27.
Table 9. Recommended VCO Range and Charge Pump Current Settings for Standard Display Formats
Standard Resolution
VGA 640 × 480
SVGA 800 × 600
XGA 1024 × 768
SXGA 1280 × 1024
1280 × 1024
TV 480i
480p
720p
1035i
1080i
1080p
1
These are preliminary recommendations for the analog PLL and are subject to change without notice.
Inputs
1 2
Sync Detect Auto PD Enable
1 X
0 0
0 1
X
Refresh Rate Horizontal
(Hz) Frequency (kHz)
60 31.5
72 37.7
75 37.5
85 43.3
56 35.1
60 37.9
72 48.1
75 46.9
85 53.7
60 48.4
70 56.5
75 60.0
80 64.0
85 68.3
60 64.0
75 80.0
60 15.75
60 31.47
60 45
60 33.75
60 33.75
60 67.5
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by Register 0x26[3]) can drive the chip into four power-down
options. Bit 2 and Bit 1 of Register 0x26 control these four
options. Bit 0 controls whether the chip is powered down or the
outputs are placed in high impedance mode (with the exception
of SOG). Bit 7 to Bit 4 of Register 0x26 control whether the
outputs, SOG, Sony Philips digital interface (SPDIF ) or I
or Inter-IC sound bus) outputs are in high impedance mode or
not. See the 2-Wire Serial Control Register Detail section for
more detail.
3
Power-On or Comments
Everything
Everything
Serial bus, sync activity detect, SOG, band gap
reference
Serial bus, sync activity detect, SOG, band gap
reference
Pixel Rate (MHz) VCO Range
25.175 00
31.500 01
31.500 01
36.000 01
36.000 01
40.000 01
50.000 01
49.500 01
56.250 01
65.000 10
75.000 10
78.750 10
85.500 10
94.500 10
108.000 10
135.000 11
13.51 00
27 00
74.25 10
74.25 10
74.25 10
148.5 11
2
S (IIS
1 1
Current
101
011
100
100
100
101
110
110
110
011
100
100
101
110
110
110
010
101
100
100
100
110