Figure 4-2 Sequence Diagram Showing Pu/Do Timers In Quick Logic (Counter Reset Mode Off) - Siemens 7SR23 DAD Manual

Chapter 1) 7SR23 DAD Description Of Operation
Figure 4-2 Sequence Diagram showing PU/DO Timers in Quick Logic (Counter Reset Mode Off)
When the count value = En Counter Target the output of the counter (En) = 1 and this value is held until the
initiating conditions are removed when En is instantaneously reset.
The output of En is assigned in the OUTPUT CONFIG>OUTPUT MATRIX menu where it can be programmed to
any binary output (O), LED (L) or Virtual Input/Output (V) combination.
Protection functions can be used in Quick Logic by mapping them to a Virtual Input / Output.
Refer to Section 7 – Applications Guide for examples of Logic schemes.
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