Crt Display Circuit - Sanyo AVM-2550S Training Manual

The CPU generates and controls all characters and data for the on-screen
displays. Excluding Captions, the VB7C chassis is designed for a green, red,
white, yellow and cyan screen display. In order to provide correct positioning,
vertical and horizontal sync signals are input to IC801 (CPU) on pins 1 (H-
sync) and 2 (V-sync). The horizontal and vertical sync pulses are limited and
wave shaped by Q882 and Q881 respectively.
Operation
Beginning with the input of the vertical sync signal, horizontal sync pulses are
counted. After counting a certain number of horizontal sync pulses, the CPU
will begin counting 8 MHz clock pulses developed at pins 19 and 20. At the
(8 MHz)

CRT DISPLAY CIRCUIT

IC801
CPU
R-OUT 42
G-OUT 41
B-OUT 40
BLK-OUT 39
C809
H-SYNC 1
X801
19 X-IN
20 X-OUT
V-SYNC 2
C808
Screen Display Control Circuit
desired number of clock pulses, the letter signals are output on pins 40-42,
and the blanking signals are output on pin 39. The letter and the blanking
signals are output as active Highs. The exact count of horizontal sync pulses
and 8 MHz clock pulses is controlled by the CPU program and will change
with the display pattern.
All display signals from the CPU are input to IC101, the Signal Processor, on
pins 33-36 where they are added to the video signal. Since the C-003 CPU
includes the Caption Data Slicer and Caption OSD, the screen displays and
caption displays cannot be shown simultaneously.
IC101
SIGNAL PROCESSOR
R849 C843
33
R844
R848 C842
34
R843
R847 C841
35
R842
R846
36
ALWAYS
5V
R821
Q882
R822
R826
Q881
C832
R827
– 27 –
T402
C831 R823
5
IC501
R828
7