Signal Processor Bus Control Circuit - Sanyo AVM-2550S Training Manual

The VB7C chassis is equipped with a new single-chip BUS-Controlled NTSC
Signal Processor IC to replace much of the mechanically adjusted
factory/service controls and all of the low pass filters in the PWM control lines
for the customer setting digital controls used in the conventional chassis.
The primary difference between this chassis and the conventional chassis is
the addition of the BUS Interface circuit and the movement of the control
registers into the Signal Processor IC, and the BUS control program
incorporated in the CPU (C-003).
The advantages of this chassis include reduced control lines and associated
circuitry, and improved productivity and increased accuracy of the factory
adjustments during production. This is due to the computerized and digitized
control circuit which allows remote operation.
IC801
CPU
BUS
34
SCL
BUS
32
SDA

Signal Processor BUS Control Circuit

SIGNAL PROCESSOR BUS CONTROL CIRCUIT
IC101
SIGNAL PROCESSOR
L814 R804
43
CLK
BUS
Interface
L813 R803
44
DATA
Control
Registers
Control of the Signal Processor IC is through CPU pins 32 and 34.
Pin 34 is the BUS SCL (Serial Data) signal. The BUS SDA is a bi-directional
signal and is used to transfer data into and out of the control registers within
IC101. Data is processed through an 8 bit read or write for each sub address
in an IC address "1011010" with in IC101.
STA ICW
STA = START Condition
ICW = IC Address* + Write
SUB = Sub. Address*
DA = Data*
STO = STOP Condition
* c See Bit Map below for IC Address,
See Bit Map below for IC Address,
Sub Address or Data for details.
Sub Address or Data for details.
BUS Data Format In Write Mode
– 14 –
SUB DA STO