Xycom XVME-113 User Manual page 63

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1 A write occurs during the overlap of a low CS1 and a low WE. A write begins at the latest transition among
CS1 going low, and WE going low. A write ends at the earliest transition among CS1 going high, and WE
going high. Twp is measured from the beginning of write to the end of write.
2 Tas is measured from the address valid at the beginning of write.
3 Twr is measured from the earliest of CS1 or WE going high to the end of the write cycle.
4 During this period, I/O pins are in output state; therefore, the input signals of the opposite phase to the
outputs must not be applied.

Figure B-1. Write Timing Waveform
XVME-113 RAM/ROM Memory Module
 
October 1992

B-5