Xycom XVME-113 User Manual page 58

Ram/rom memory module
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Appendix A - VMEbus Connector/Pin Description
A.2
BACKPLANE CONNECTOR P1
The following table lists the P1 pin assignments by pin number order. (The connector consists of three rows of pins labeled
rows A, B, and C.)
Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
A-6
Table A-2. P1 Pin Assignments
Row A
Signal
Pin
Mnemonic
D00
D01
D02
D03
D04
D05
D06
D07
GND
SYSCLK
GND
DS1*
DS0*
WRITE*
GND
DTACK
GND
AS*
GND
IACK*
IACKIN*
IACKOUT*
AM4
A07
A06
A05
A04
A03
A02
A01
-12V
+5V
Row B
Row C
Signal
Signal
Mnemonic
Mnemonic
BBSY*
BCLR*
ACFAIL*
BG0IN*
BG0OUT*
BG1IN*
BG1OUT*
BG2IN*
BG2OUT*
BG3IN*
SYSFAIL*
BG3OUT*
BERR*
BR0*
SYSRESET*
BR1*
LWORD*
BR2*
BR3*
AM0
AM1
AM2
AM3
GND
SERCLK(1)
SERDAT(1)
GND
IRQ7*
IRQ6*
IRQ5*
IRQ4*
IRQ3*
IRQ2*
IRQ1*
+5V STDBY
+5V
D08
D09
D10
D11
D12
D13
D14
D15
GND
AM5
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A09
A08
+12V
+5V

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