Xycom XVME-113 User Manual page 43

3.4.6.1 Carry Flag (CF)
The CF bit indicates that an internal carry has overlapped with a read from the 64 Hz Counter Register or a carry
occurred from the Seconds Counter Register. After each read operation, the CF bit should be polled to ensure that the
data read is valid. If the CF bit is set after a read operation, the data is not valid and must be read again. Refer to the
procedure for reading the RTC time in section 3.4.2
The CF bit can be reset by writing a '0' to it during any period except the carry period. A write of '1' to this bit is invalid.
3.4.6.2 Alarm Flag (AF)
The AF bit indicates to the host processor that the time specified in the enabled alarm registers has been reached. This
bit will remain set as long as the corresponding counter registers match the alarm registers. When the alarm condition
is no longer true, the AF bit will automatically be cleared to '0'.
The AF bit may be reset by writing a '0' to it during any period except the alarm period. In other words, writing a '0' to
the AF bit while the alarm condition is still true will reset the bit to '0' but only momentarily. The AF bit will be set again
immediately due to the alarm condition. A write of '1' to this bit is invalid.
3.4.7
Control Register B (RTC Register 1Fh)
RAM RAM
7
The TEST bit should always be set to '0'. User functions are not guaranteed if the
TEST bit has been set to '1'.
The bits in this register are used to control the operation of the RTC. It contains four defined bits which are used to test,
adjust, reset, start or stop the counter. The other four bits may be employed by the user as read-write bits to be used as
RAM or flag bits.
RAM RAM
6 5
TEST ADJ
4
NOTE
XVME-113 RAM/ROM Memory Module
RESET Start/Stop
October 1992
3-7