Camera Block - Panasonic KX-HCM110A Service Manual

3. If the Ipsec is not encrypted, it is sent without change. If it is encrypted,
this is carried out in the Encryption Block and a header is added to
send to the Ethernet MAC part.
13.2. CAMERA BLOCK
<Basic Circuit Operation>
With a 0.35umCMOS process, this CMOS image sensor is composed of one chip that integrates the
sensor assembly with the image processing DSP. Individual pixels composed of four transistors have
micro-lenses to increase sensitivity, and light energy is converted to analog voltage. After that, the
analog pixel voltage is converted to digital in a 10-bit AD Converter (ADC), at which time Correlated
Double Sampling (CDS) dramatically reduces Fixed Pattern Noise (FPN).
The digitized analog pixel voltage data is gamma and color corrected, goes through color space
conversion, and with PCLK, Hsync, and Vsync employed as timing interface signals, YUV is
sequentially output digitally in 8-bit wide format. Image processing functions such as Auto-Iris (AE) and
Auto White Balance (AWB) are built in and controlled automatically according to an internal algorithm in
the chip.
Auto-Iris (AE) is controlled by the shutter speed.
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