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AN2339
Application note
STR91x hardware development
getting started
Introduction
The STR91x MCUs are derivatives of the STMicroelectronics STR9 family of 32-bit 0.18µ
HCMOS microcontrollers. They combine high CPU performance (CPU frequency up to 96
MHz) with rich peripheral functionalities and enhanced I/O capabilities. They offer up to 96
MIPS directly from Flash memory, very large SRAM with optional battery backup and
support clock generation via PLL or via an external clock. The STR91x can perform signal-
cycle DSP instructions good for speech processing, audio algorithms, and low-end imaging.
This application note provides a complement to the information in the STR91x datasheet
and reference manual by describing the minimum hardware environment required to build
an application around the STR91x. It's divided into six chapters: minimum hardware
requirements, power supply, clock management, reset control, development and debugging
tool support and basic schematic. Each chapter gives the hardware needed for each
specific section and does not describe the STR91x blocks in detail. To get detailed
description of these features, refer to STR91x datasheet and reference manual or STR910
Eval-Board datasheet.
May 2006
Rev 2
1/20
www.st.com
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Summary of Contents for ST STR91 Series
- Page 1 Each chapter gives the hardware needed for each specific section and does not describe the STR91x blocks in detail. To get detailed description of these features, refer to STR91x datasheet and reference manual or STR910 Eval-Board datasheet. May 2006 Rev 2 1/20 www.st.com...
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Page 2: Table Of Contents
Contents AN2339 Contents Hardware requirements summary ......4 Power supply ..........5 Main operating voltages . - Page 3 AN2339 Contents STR91x basic schematic ........18 Revision history .
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Page 4: Hardware Requirements Summary
Hardware requirements summary AN2339 Hardware requirements summary In order to build an application around STR91x, the application board should, at least, provide the following features: ● Power supply ● Clock management ● Reset control ● JTAG/Mictor connector 4/20... -
Page 5: Power Supply
AN2339 Power supply Power supply Figure 1. Power Supply Overview 128-pin devices 80-pin devices (from 1V up to V A/D converter A/D converter REF_ I/O Ring I/O Ring (3V or 3.3V) (3V or 3.3V) Note 1 Note 1 BATT BATT SRAM SRAM (1.8V) -
Page 6: Analog Supply And Reference
Power supply AN2339 Figure 2. Typical layout for VDD/VSS pair Via to VDD Via to VSS Cap. STR91x Analog supply and reference The ADC unit on 128-pin packages has an independent A/D Converter Supply and Reference Voltage. This means that it has an isolated analog voltage supply input at pin AVDD to accept a very clean voltage source. -
Page 7: Clock Management
AN2339 Clock management Clock management The STR91x offers a flexible way for selecting the core and peripheral clocks, the devices have up to four external clock source inputs: Main Oscillator, RTC, USB Clock and TIM clocks. It also provides one output clock. Figure 3. -
Page 8: Real Time Clock
Clock management AN2339 Figure 4. Recommended circuitry for crystal oscillator pins X1_CPU and X2_CPU XTAL2 XTAL1 The values of the load capacitors C1 and C2 also heavily depend on the crystal type and frequency. For best oscillation stability they normally have the same value. Typical values are in the range from below 10pF up to 30pF. -
Page 9: Usb Clock
AN2339 Clock management Figure 5. 32.768 kHz oscillator STR91xF X1_RTC TAMPER_IN X2_RTC For more details concerning capacitance, refer to the crystal manufacturer datasheet. can be: : if you want to preserve tamper function when V and V are switched off. BATT : if you don’t want to preserve tamper function when V and V... -
Page 10: Reset Control
Reset control AN2339 Reset control There are two types of internal hardware reset, defined as System Reset and Global Reset. The STR91x device also provides a Reset output signal. Reset input 4.1.1 System Reset A system reset resets all registers except the Clock Control Register, PLL Configuration Register, System Status Register, Flash Configuration register, Protection register and the FMI Bank address and Bank size Registers. -
Page 11: Reset Output
AN2339 Reset control Power On Reset (POR reset) Internal reset is active until VDDQ and VDD are both above the LVD thresholds. This POR condition has a duration of t (10ms min) after which the CPU fetches the first instruction from address 0x0000 0000. -
Page 12: Development And Debugging Tool Support
Development and debugging tool support AN2339 Development and debugging tool support The STR91xF device supports connection to both In-Circuit Emulators (ICE) via standard JTAG interface and trace tools via an Embedded Trace Macrocell (ETM9) interface. JTAG interface The STR91x has a user debug interface. It contains a six-pin serial interface conforming to JTAG, IEEE standard 1149.1-1993, “Standard Test Access Port-Scan Boundary Architecture”. - Page 13 AN2339 Development and debugging tool support Table 1. JTAG interface signals STR91x Direction/ Std name Function Description name The RTCK signal is returned by the core to the JTAG equipment, and the clock is not Return TCK (to advanced until the core had captured the data. RTCK JRTCK JTAG equipment)
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Page 14: Jtag Signal Integrity And Maximum Cable Lengths
Development and debugging tool support AN2339 The following table shows the recommended values and types: Table 2. Recommended JTAG debug port components Signal name Recommended external resistor type Should have a pull-down between pin and VSSQ to enable hot swap and JTCK post-mortem debugging JTDI... -
Page 15: Etm Interface Pins
AN2339 Development and debugging tool support 5.2.1 ETM Interface pins The ETM interface pins consist of the following signals: Table 3. ETM interface signals STR91x Signal Target board Description name Not used No Connect Not used No Connect VSSQ VSSQ Signal ground DBGRQ Not used... -
Page 16: Minimizing Signal Skew (Balancing Pcb Track Lengths)
Development and debugging tool support AN2339 Table 3. ETM interface signals STR91x Signal Target board Description name Vsupply Supply voltage Port A TRACEPKT[7] Not used The trace packet port Port A TRACEPKT[6] Not used The trace packet port Port A TRACEPKT[5] Not used The trace packet port Port A TRACEPKT[4]... - Page 17 AN2339 Development and debugging tool support The series resistor must be placed as close as possible to the STR91x pins (less than 0.5 inches) The value of the resistor must equal the impedance of the track minus the output impedance of the output driver. A source terminated signal is only valid at the end of the signal path.
- Page 18 STR91x basic schematic AN2339 STR91x basic schematic The following schematic describes the minimum hardware requirements to get the STR91x running. +3V3 The values of the load capacitors C2 and +3V3 C3 depend on the crystal type. 20pF JP801 +3V3 20pF TRST RESET# MCU_X1...
- Page 19 AN2339 Revision history Revision history Table 4. Document revision history Date Revision Changes 14-Apr-2006 Initial release. 10-May-2006 Added Section 6: STR91x basic schematic. 19/20...
- Page 20 No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein.
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