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7.1.3. Interrupt
Note:
- nHALT signal is consistent with the existing PBX and performs
polling by I/O port.
However, when the CPU (IC1) goes to Sleep Mode at HALT, the
CPU (IC1) is enabled for interruption on release nHALT and return
from Sleep Mode.
- The nIRQ[0] interrupt of ASIC (IC2) is set to output and the
interrupt output is to the CPU (IC1) (Mainly, DPRAM
communication interrupts).
- The LOS signal of the T1-IC (IC302) is a level output which goes "H
level" at the line reference lost. Thus,
available at the line reference lost by inputting the inversion signal
of the LOS to the CPU (IC1). The polling operation is also possible
by setting the nIRQ4 terminal of the CPU (IC1) to i/o port.
Fig.5.1 External interrupt image
19
edge interruption is
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