Pcb Layout - Linear Technology DC1954A Demo Manual

typical Dc1954a reQuirements anD characteristics
PARAMETER INPUT OR OUTPUT PHYSICAL LOCATION
3.3V Power Supply Input
OUT0+, OUT0– Two Outputs
OUT1+, OUT1– Two Outputs
OUT2+, OUT2– Two Outputs
OUT0SEL Input
OUT1SEL Input
OUT2SEL Input
TEMP Input/Output
TEMP GND Input
SYNC Input
IN+, IN– Input
*Any unused RF output must be powered down or terminated with 50Ω, or poor spurious performance may result.

pcb layout

J11 and J10 Banana Jacks, or 3.15V-3.45V and
GND Turrets
J1 and J2 SMA Connectors*
J3 and J4 SMA Connectors*
J5 and J6 SMA Connectors*
JP1 3-Pin Headers
JP2 3-Pin Headers
JP3 3-Pin Headers
Turret
Turret
J7 SMA Connector and Turret
J8 and J9 SMA Connectors
Top Layer
DEMO MANUAL DC1954A
DETAILS
Low-Noise and Spur-Free 3.3V, ≥400mA Capable Power
Supply; Typically DC1954 Consumes ~300mA; Powers
LTC6954, U2, U3, and U4
Refer to Figure 1 or Table 1 for Output Type
If LVPECL: AC-Coupled
If LVDS/CMOS: DC-Coupled
Refer to LTC6954 Data Sheet for Output Levels for LVPECL, or
LVDS/CMOS Option
If LVPECL:
OUTxSEL=H: IBIAS=ON, for Default LVPECL BOM
OUTxSEL=L: IBIAS=OFF, Must Install External Pull-Down
Resistor, Refer to schematic
If LVDS/CMOS:
OUTxSEL=H: LVDS, Default LVDS/CMOS BOM
OUTxSEL=L: CMOS, Remove 100Ω Differential Termination,
Refer to Schematic
Temperature Monitoring Diode; Force Current Measure
Voltage, Refer to Data Sheet
EZSync, 0V to 3.3V Control Signal, Refer to the Data Sheet
Input Signal Pins
dc1954af
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