Pcb Layout - Linear Technology DC2491A Demo Manual

PCB LAYOUT

Best PSRR Performance: PCB Layout for Input Trace
For applications utilizing the LT3045 for post-regulating
switching converters, placing a capacitor directly at the
LT3045 input results in AC current (at the switching fre-
quency) to flow near the LT3045. Without careful attention
to PCB layout, this relatively high frequency switching cur-
rent generates an electromagnetic field (EMF) that couples
to the LT3045 output, thereby degrading its effective PSRR.
While highly dependent on the PCB, the switching pre-
regulator, and the input capacitor size, among other factors,
the PSRR degradation can easily be 30dB at 1MHz. This
degradation is present even if the LT3045 is de-soldered
from the board, because it effectively degrades the PSRR
of the PC board itself. While negligible for conventional low
PSRR LDOs, LT3045's ultrahigh PSRR requires careful
attention to higher order parasitics in order to realize the
full performance offered by the regulator.
Figure 2. Layer 3 of DC2491A
DEMO MANUAL DC2491A
The LT3045 demo board alleviates this degradation in
PSRR by using a specialized layout technique. On layer 3,
the input trace (V ) is highlighted in red, with the return
IN
path (GND) highlighted on the bottom layer together with
input capacitor C1. When an AC voltage is applied to the
input of the board, AC current flows on this path, thus
generating EMF . This EMF couples to output capacitor
C2 and related traces, making the PSRR appear worse
than it actually is. With the input trace directly above
the return path, the EMFs are in opposite directions,
and consequently cancel each other out. Making sure
these traces exactly overlap each other maximizes the
cancellation effect and thus provides the maximum
PSRR offered by the regulator.
Figure 3. Bottom Layer of DC2491A
dc2491af
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