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3.6.3.2.1.10 Intel I210 LAN Chip 5 (PCI-E Port 9)
Item
Intel I210 LAN Chip 5 (PCI-E
Port 9)
ASPM 8
L1 Substates
PCIe Speed
Detect Timeout
Option
Enabled[Default],
Disabled
Disabled[Default],
L0s
L1
L0sL1
Auto
Disabled,
L1.1
L1.1 & L1.2[Default]
Auto[Default]
Gen1
Gen2
Gen3
0
HPS-246U4A/HPS-246UTA Quick Reference Guide 67
Quick Reference Guide
Description
Control the PCI Express Root Port.
Set the ASPM Level: Force L0s – Force all
links to L0s State AUTO – BIOS auto
configure DISABLE – Disables ASPM.
PCI Express L1 Substates settings.
Configure PCIe Speed.
The number of milliseconds reference code
will wait for link to exit Detect state for
enabled ports before assuming there is no
device and potentially disabling the port.
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