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EVM Operation
4.2
Reference Voltage
The DAC8803/14 can be configured to use the on-board reference/buffer circuits (U1, U5 and U6) or an
external reference applied to pin 20 of J1. Jumpers W5 through W8 control the on-board reference source.
In the factory default position (shunt on W5 through W8 and W10 pins 1-2), a –10-V reference is supplied
by U5. Moving the shunts at W5 through W8 to pins 2-3 applies the on-board +10-V reference to the DAC.
Jumper W10 must be configured so that it's associated shunt is located on pins 2-3 in order to use a
common external reference voltage. An external reference source is buffered by U6 and requires W5
through W8 to have their shunts covering pins 2-3. When using an external reference, be sure to use a
clean source that is within the data sheet specifications.
5
EVM Operation
5.1
Analog Output
The analog output is applied directly to J1 (top and bottom side). It can be further applied to optional
amplifier and signal conditioning modules when used in conjuction with compatible interface boards, such
as the HPA-MCU Interface (SLAU106). The analog output range is dependent on the configuration of the
EVM and the reference applied to the DAC installed on the board. Consult section 4.2 of this users guide
and the DAC8803/14 data sheet to determine the maximum analog output range.
5.2
Digital Control
The digital control signals can be applied directly to J2 (top or bottom side). The DAC8803/14 EVM can
also be connected directly to a DSP or microcontroller interface board such as the 5-6K Interface Board or
the HPA-MCU Interface Board. Refer to the product folder for the DAC8803/14 for a current list of
compatible interface and/or accessory boards.
5.3
Load DAC (LDAC)
The LDAC signal is found on J2.17. When used with one of the interface boards mentioned above, this
signal is typically controlled through a timer function or GPIO. LDAC may be held low if desired by placing
a shunt jumper across J2 pins 17 and 18.
5.4
Daisy Chain Mode
Up to two DAC8803/14 EVMs can be used together in order to facilitate the daisy chain mode of
operation. The top and bottom side connectors of J2 have signal configurations that allow a second EVM
to be mounted in a stacked arrangement. The data out of J2.11 on the top side is delayed by 16 clock
cycles. When using daisy chain mode of operation, it is important to remember that data only shifts
through the device while CS is held low. Jumpers W1 through W4 allow the outputs of the individual DACs
in the stack to have their own output voltage pin. Refer to the schematic and section 4 for details.
5.5
Default Jumper Locations
The following table provides a list of the jumpers and switches located on the EVM and their factory
default conditions.
Jumper
Shunt Position
W1 - W4
W5 - W8
W9
W10
4
DAC8803/14 EVM
1-2
Control which pin on J1 receives the DAC output voltage. Allows up to eight outputs (total)
when using daisy chain features and two EVMs.
1-2
Control the application of +10V or –10V to the reference pin of DACa through DACd. –10V is
the default.
1-2
Selects +5VD as the voltage source for DAC power. Voltage source should be applied to J3,
pin 10.
1-2
Selects the on-board reference voltage via U1 and U6. External reference is buffered by U6
when W10 is shunted pins 2-3.
Jumper Description
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SLAU184 – May 2006
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