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This user's guide describes the characteristics, operation, and use of the TPD1E01B04 EVM evaluation
module (EVM). This EVM includes six TPD1E01B04s in various configurations for testing. Five
TPD1E01B04s are configured for IEC 61000-4-2 compliance testing and one is configured for 2-port s-
parameter analysis. This user's guide includes setup instructions, schematic diagrams, a bill of materials,
and printed-circuit board layout drawings for the evaluation module.
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Bill of Materials
SLVUAN5 - April 2016
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Copyright © 2016, Texas Instruments Incorporated
TPD1E01B04 Evaluation Module
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User's Guide
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TPD1E01B04 Evaluation Module
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Summary of Contents for Texas Instruments TPD1E01B04

  • Page 1: Table Of Contents

    SLVUAN5 – April 2016 TPD1E01B04 Evaluation Module This user's guide describes the characteristics, operation, and use of the TPD1E01B04 EVM evaluation module (EVM). This EVM includes six TPD1E01B04s in various configurations for testing. Five TPD1E01B04s are configured for IEC 61000-4-2 compliance testing and one is configured for 2-port s- parameter analysis.
  • Page 2: Introduction

    TPD1E01B04 device. The TPD1E01B04 is a unidirectional TVS ESD protection diode for HDMI 2.0 and USB 3.1 Gen II Super-speed data line protection. The TPD1E01B04 is rated to dissipate ESD strikes at the maximum level specified in the IEC 61000-4-2 international standard (Level 4).
  • Page 3: Setup

    ESD clamping waveforms are outlined as well. IEC 61000-4-2 ESD Rating Tests TPD1E01B04 (D1 – D5) can be used for destructive electrostatic discharge (ESD) pass or fail strikes. Specifically, they can be used for both IEC 61000-4-2 air and contact discharge tests. The procedure in Section 3.1.1...
  • Page 4: Scattering Parameters

    ESD. Scattering Parameters A TPD1E01B04 (D6) is configured with 2 SMA (J1 and J2) connectors to allow 2-port analysis with a vector network analyzer. Connect Port 1 to J1 and Port 2 to J2. This configuration allows for the following terminology in 2-port analysis: •...
  • Page 5 Recommended settings for the time axis is 20 ns/div and for the voltage axis is 10 V division. The voltage levels of the ESD applied to J1.Pin1 should not exceed ±8 kV while capturing clamping waveforms. SLVUAN5 – April 2016 TPD1E01B04 Evaluation Module Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 6: Board Layout

    FR408HR at 0.062 inch thickness. Layers 2, 3, and 4 are ground planes and not shown here. Figure 3. TPD1E01B04EVM Top Layer and Silkscreen Schematics Figure 4. TPD1E01B04EVM Schematic TPD1E01B04 Evaluation Module SLVUAN5 – April 2016 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 7: Bill Of Materials

    J1, J2 Connector, TH, End launch Connector, TH, 142-0761-881 Johnson SMA 50 Ω End launch SMA Standard Banana Jack, 6092 6092 Keystone Insulated, Black SLVUAN5 – April 2016 TPD1E01B04 Evaluation Module Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated...
  • Page 8 STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein. Acceptance of the EVM is expressly subject to the following terms and conditions.
  • Page 9 FCC Interference Statement for Class B EVM devices NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
  • Page 10 【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの 措置を取っていただく必要がありますのでご注意ください。 1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用 いただく。 2. 実験局の免許を取得後ご使用いただく。 3. 技術基準適合証明を取得後ご使用いただく。 なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。 上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ ンスツルメンツ株式会社 東京都新宿区西新宿6丁目24番1号 西新宿三井ビル 3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page 電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧くださ い。http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page SPACER EVM Use Restrictions and Warnings: 4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
  • Page 11 Notwithstanding the foregoing, any judgment may be enforced in any United States or foreign court, and TI may seek injunctive relief in any United States or foreign court. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2015, Texas Instruments Incorporated...
  • Page 12 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue.

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