Advertisement
Quick Links
Advertisement
Related Manuals for Epson SED1751
Summary of Contents for Epson SED1751
- Page 1 SED1751...
- Page 2 SED1751 Contents OVERVIEW ........................... 5-1 TERMINAL FUNCTIONS ......................5-3 ABSOLUTE MAXIMUM RATINGS ....................5-9 EPSON MLS Driver Chip Set Technical Manual...
- Page 3 SED1580, can be used to structure a 4-line MLS drive. The SED1751 uses a slim-chip form that is useful for making LCD panels slimmer. It also supports reduced logic system voltage operation, making it suitable for a broad range of applications.
- Page 4 SED1751 Pad Coordinates Units: µm Name Name –5812 –1012 COM1 5945 –902 DDHL –5717 COM2 –822 COM3 –742 –5622 –V –5527 COM4 –662 ↓ ↓ ↓ ↓ GNDL –5432 –5094 COM22 5945 –4869 COM23 5945 COM24 5945 –4531 LSEL –4192...
- Page 5 SED1751 TERMINAL FUNCTIONS Number of Terminal Name I/O Function Terminals COM1 to Common (row) output to drive LC. COM120 Output transition occurs on falling edge of LP. Carry signal I/O. CIO1 This is set to input or output depending on the level of CIO2 the SHL input.
- Page 6 SED1751 Block Diagram COM 1 COM 120 V DDHL GNDL GNDR +V1L +V1R LCD Driver: 120-bits –V1L –V1R DOFF V CC Level Shifter: 3x120-bits TEST1 Data Register: 120-bits Bi-directional Shift Register: 30-bits CIO2 CIO1 LSEL CSEL EPSON 5–4 MLS Driver Chip Set...
- Page 7 SED1751 Explanation of Each Block Shift Register This is a bi-directional shift register used for transmitting common data. The display data shifts on the falling edge of LP. Level Shifter The level shifter is a voltage level converter circuit which converts the signal voltage level from a logic system level to the LC driver system voltage level.
- Page 8 SED1751 Timing Diagram (1) 1/240 duty, normal operation. SHL = L, SEL = L, LSEL = L, CSEL = L (This diagram provided only as a reference.) 240 lines 30 31 32 33 60 61 62 63 90 91 92 93...
- Page 9 SED1751 Timing Diagram (2) 1/240 duty, 1/2 H operation. SHL = L, SEL = L, LSEL = H, CSEL = L (This diagram provided only as a reference.) 240 lines 1/120 2/120 1/121 2/121 2/240 1/1 1/30 1/31 1/60 1/61...
- Page 10 SED1751 ABSOLUTE MAXIMUM RATINGS Item Signal Rated Value Units Power voltage (1) –0.3 to +7.0 Power voltage (2) –0.3 to + 45.0 ± V Power voltage (3) GND – 0.3 to V + 0.3 Input voltage GND – 0.3 to V + 0.3...
-
Page 11: Electrical Characteristics
SED1751 Electrical Characteristics DC Characteristics = + 5.0 V ± 10%, Ta = –30 to 85°C Unless otherwise noted, GND = 0 V, V Applicable Item Signal Parameter Unit Terminals Power Supply Voltage (1) Range Operating Function 42.0 Voltages Power Supply... - Page 12 SED1751 Range of Operating Voltages: V – V It is necessary to set the voltage for V within the V – V operating voltage range shown in the diagram below. Range of Operating Voltage V CC (V) EPSON 5–10 MLS Driver Chip Set...
- Page 13 SED1751 AC Characteristics Input Timing Characteristics FRDS FRDH F1, F2 FFDS FFDH WCLH WCLD CIO1, 2 (IN) The FR latched at the nth LP is reflected in the output at the n+1th LP. = +5.0 V ± 10%, Ta = –30 to +85°C)
- Page 14 SED1751 Output Timing Characteristics pdDOC CIO1, 2 (OUT) pdCCL DOFF pdCDOF Output = 5.0 V ± 10%, V = +14.0 to +42.0 V, Ta = –30 to +85°C) Item Signal Parameter Units Delay time from LP to CIO output pdDOC...
- Page 15 Logic System LCD System SED1751D When the SED1580 and the SED1751 are used to form an extremely low power module system, the power relationships as shown in the figure above between the SED1580 and SED1751 logic systems, and the LCD system power supply, and the LCD controller power supply are optimal.
- Page 16 SED1751 Example of Connection Large Screen LCD Structure Diagram EIO1 EIO2 BSEL D0~7 LSEL DOFF F1O~F2O XSCL XSCL F1O~F2O DOFF LSEL D0~7 BSEL EIO2 EIO1 EIO1 EIO2 BSEL D0~7 LSEL DOFF F1O~F2O XSCL XSCL F1O~F2O DOFF LSEL D0~7 BSEL EIO2...
- Page 17 SED1751 Example of External Connections (Rear surface should be P1 coated.) (Molding range) (Molding range) EPSON 5–15 MLS Driver Chip Set Technical Manual...