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Related Manuals for Congatec COM Express conga-TS370
Summary of Contents for Congatec COM Express conga-TS370
- Page 1 COM Express™ conga-TS370 8th Generation Intel® Core™ i7, i5, i3 and Xeon processor with either QM370, HM370, or CM246 Chipset User’s Guide Revision 1.7...
- Page 2 Updated table 5 “Power Consumption Values” • Updated the link for standard 12 V power supply implementation guidelines in section 6.1.14 “Power Control” • Added information about congatec MLF file to section 11 “BIOS Setup Description” • Deleted section 12 “Industry Specifications” 2021-04-19 •...
- Page 3 DECLINE ALL LIABILITY for damages, direct or indirect, that result from the use of this software. OEM/ CGUTL BIOS BIOS/UEFI modified by customer via the congatec System Utility (CGUTL) is subject to the same license as the BIOS/UEFI it is based on. You can find the specific details at https://www.congatec.com/en/licenses/.
- Page 4 The information contained within this user’s guide, including but not limited to any product specification, is subject to change without notice. congatec GmbH provides no warranty with regard to this user’s guide or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing.
- Page 5 Copyright © 2018, congatec GmbH. All rights reserved. All text, pictures and graphics are protected by copyrights. No copying is permitted without written permission from congatec GmbH. congatec GmbH has made every attempt to ensure that the information in this document is accurate yet the information contained within is supplied “as-is”.
- Page 6 (c) arising from course of performance, course of dealing, or usage of trade. congatec GmbH shall in no event be liable to the end user for collateral or consequential damages of any kind. congatec shall not otherwise be liable for loss, damage or expense directly or indirectly arising from the use of the product or from any other cause.
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Page 7: Table Of Contents
GmbH technicians and engineers are committed to providing the best possible technical support for our customers so that our products can be easily used and implemented. We request that you first visit our website at www.congatec.com for the latest documentation, utilities and drivers, which have been made available to assist you. - Page 8 Power Management ..............37 Supported Operating Systems ..........15 Mechanical Dimensions ............15 Additional Features ..............38 Supply Voltage Standard Power ..........16 congatec Board Controller (cBC) ..........38 2.4.1 Electrical Characteristics ............16 7.1.1 Board Information ..............38 2.4.2 Rise Time .................
- Page 9 BIOS Setup Description ............74 11.1 Navigating the BIOS Setup Menu ........... 74 11.2 BIOS Versions................74 11.3 Updating the BIOS ..............75 11.3.1 Updating from External Flash ..........75 11.4 Supported Flash Devices ............75 Copyright © 2018 congatec GmbH TSCOm17 9/75...
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Page 10: Introduction
SMBus Signal Description ............67 Table 34 General Purpose Serial Interface Signal Descriptions ....68 Table 35 Module Type Definition Signal Description ......68 Table 36 Power and GND Signal Descriptions ........69 Copyright © 2018 congatec GmbH TSCOm17 10/75... -
Page 11: Options Information
Simply unplug one module and replace it with another; no redesign is necessary. Copyright © 2018 congatec GmbH TSCOm17... -
Page 12: Specifications
8 USB 2.0 (4 USB 3.1) 8 USB 2.0 (4 USB 3.1) USB Ports SATA (6 Gbps) LVDS DP++ Processor TDP (cTDP down) 45 W (35 W) 45 W (35 W) 45 W (35 W) 35 W (N.A) Copyright © 2018 congatec GmbH TSCOm17 12/75... -
Page 13: Supported Operating Systems
2400 MT/s dual channel (ECC or Non-ECC) Non-ECC PCIe Lanes 8 Gen 3 USB Ports 8 USB 2.0 (4 USB 3.1) SATA (6 Gbps) LVDS DP++ 25 W (N.A) Processor TDP (cTDP down) Copyright © 2018 congatec GmbH TSCOm17 13/75... -
Page 14: Supply Voltage Standard Power
GPIOs/SDIO BIOS AMI Aptio V UEFI 2.6 firmware ® 32 MB serial SPI flash with congatec Embedded BIOS features Power ACPI 4.0a compliant with battery support. S5e mode (see section 7.1.7 “Enhanced Soft-Off State”) Management Deep Sx and Suspend to RAM (S3) congatec Board Multi-stage watchdog, non-volatile user data storage, manufacturing and board information, board statistics, hardware monitoring, fan control, I²C... -
Page 15: Power Consumption
18 mm. If the 8 mm (height) carrier board connector is used, then approximate overall height is 21 mm. Heatspreader Module PCB 4.00 13.00 7.00 18.00 5.00 2.00±10% All dimensions in millimeter 4.50 Carrier Board PCB Copyright © 2018 congatec GmbH TSCOm17 15/75... -
Page 16: Supply Voltage Battery Power
(10 Hz to 20 MHz) Power (w. derated input) Conversion Power (Ampere) (Volts) (Volts) (Volts) (mV) (Watts) Efficiency (Watts) VCC_12V 11.4-12.6 11.4 +/- 100 VCC_5V-SBY 4.75-5.25 4.75 +/- 50 VCC_RTC 2.5-3.3 +/- 20 Copyright © 2018 congatec GmbH TSCOm17 16/75... -
Page 17: Environmental Specifications
10% to 90% portion of the rise time, the slope of the turn-on waveform must be positive. Power Consumption The power consumption values were measured with the following setup: • conga-TS370 COM • modified congatec carrier board • conga-TS370 cooling solution • Microsoft Windows 10 (64 bit) Note... -
Page 18: Block Diagram
1. Do not use the CMOS battery power consumption values listed above to calculate CMOS battery lifetime. 2. Measure the CMOS battery power consumption of your application in worst case conditions (for example, during high temperature and high battery voltage). Copyright © 2018 congatec GmbH TSCOm17 18/75... -
Page 19: Cooling Solutions
Storage: 5% to 95% Caution The above operating temperatures must be strictly adhered to at all times. When using a congatec heatspreader, the maximum operating temperature refers to any measurable spot on the heatspreader’s surface. Humidity specifications are for non-condensing conditions. -
Page 20: Csp Dimensions
SM Bus SPI Flash 0 SPI0 PECI MGMNT SDIO GPIO/SDIO congatec Board GPIO I2C Bus Controller LID/SLEEP/FAN LID# / SLEEP# / FAN Generation SER0/1 UART CAN Controller Optional - Not available by default Copyright © 2018 congatec GmbH TSCOm17 20/75... -
Page 21: Hsp Dimensions
Cooling Solutions congatec GmbH offers the cooling solutions listed in table 7 for the conga-TS370. The dimensions of the cooling solutions are shown in the sub-sections. All measurements are in millimeters. Table 7 Cooling Solution Variants Cooling Solution Part No. - Page 22 CSA Dimensions 96.6 14.5 M2.5 x 13 mm threaded standoff for threaded version ø2.7 x 13 mm non-threaded standoff for borehole version Copyright © 2018 congatec GmbH TSCOm17 22/75...
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Page 23: Heatspreader Thermal Imagery
CSP Dimensions 14.5 M2.5 x 13 mm threaded standoff for threaded version ø2.7 x 13 mm non-threaded standoff for borehole version Copyright © 2018 congatec GmbH TSCOm17 23/75... -
Page 24: Onboard Temperature Sensors
HSP Dimensions 41.5 M2.5 x 11 mm threaded standoff for threaded version ø2.7 x 11 mm non-threaded standoff for borehole version Copyright © 2018 congatec GmbH TSCOm17 24/75... - Page 25 The thermal image below shows the heat composition on the heatspreader surface area. System designers must ensure that the system’s cooling solution is designed to dissipate the heat from the hottest surface spots of the heatspreader. Copyright © 2018 congatec GmbH TSCOm17...
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Page 26: Connector Rows
The CPU temperature sensor (T00) is located in the CPU (U1). This sensor measures the CPU temperature and is defined in CGOS API as CGOS_TEMP_CPU. The sensor location is shown below: CPU Temperature Sensor Copyright © 2018 congatec GmbH TSCOm17 26/75... -
Page 27: Digital Display Interface
The conga-TS370 offers two board temperature sensors on the bottom-side of the module. These sensors measure the temperature of the module and are defined in CGOS API as CGOS_TEMP_BOARD and CGOS_TEMP_BOARD_ALT respectively. The sensor locations are shown below: Temp. Sensor 1 (Cold Spot) Temp. Sensor 2 (Hot Spot) Copyright © 2018 congatec GmbH TSCOm17 27/75... -
Page 28: Hdmi
• 1 x16 link (default), 2 x8 links or 1 x8 + 2 x4 links • graphics or non-graphics PCI Express devices • lane reversal Note The PEG lanes can not be linked together with the PCI Express lanes in section 6.1.1 “PCI Express™”. Copyright © 2018 congatec GmbH TSCOm17 28/75... -
Page 29: Lvds/Edp
LANE LANE LANE LANE LANE LANE LANE Single Link (1x16 Link) Link 1 Double Links (2x8 Links) Link 1 Link 2 Triple Links (1x8 + 2x4 Links) Link 1 Link 2 Link 3 Copyright © 2018 congatec GmbH TSCOm17 29/75... -
Page 30: Sata
1. If VGA interface is enabled in the BIOS menu, the third DDI interface (DDI3) will support only TMDS. 2. To enable VGA, go to Advanced -> Graphics menu and change the Digital Display Interface 3 option. Copyright © 2018 congatec GmbH TSCOm17... -
Page 31: High Definition Audio (Hda)
• eDP 1.4 specification • Spread-Spectrum Clocking • eDP display authentication Note The LVDS/eDP interface does not support LVDS and eDP signals at the same time. The eDP interface does not support HDCP Copyright © 2018 congatec GmbH TSCOm17 31/75... -
Page 32: Power Control
The USB ports are configured in the BIOS setup menu to operate by default in Gen 1 mode. Before you change the default setting to Gen 2, ensure the carrier board is designed for Gen 2 operation. For Gen 2 design considerations, contact congatec technical support center. - Page 33 10.1.1 “LPC Bus”. 6.1.9 I²C Bus The I²C bus is implemented through the congatec Board Controller and accessed through the congatec CGOS driver and API. The controller provides a fast-mode multi-master I²C bus that has the maximum I²C bandwidth. 6.1.10 General Purpose Serial Interface The conga-TS370 offers two standard 16C550 UARTs on the A–B connector via the congatec Board Controller.
- Page 34 6.1.11 GPIOs The conga-TS370 offers General Purpose Input/Output signals on the A–B connector. The GPIO signals are controlled by the congatec Board controller. 6.1.12 Power Control PWR_OK Power OK from main power supply or carrier board voltage regulator circuitry. A high value indicates that the power is good and the module can start its onboard power sequencing.
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Page 35: Power Management
0.8V when the 12V is applied to the module. Actively driving PWR_OK high is compliant to the COM Express specification but this can cause back driving. Therefore, congatec recommends driving the PWR_OK low to keep the module in reset and tri-state PWR_OK when the carrier board hardware is ready to boot. -
Page 36: Additional Features
This will help to determine if the rise is indeed monotonic and does not have any dips. For more information, see the “Power Supply Design Guide for Desktop Platform Form Factors” document at www.intel.com. Copyright © 2018 congatec GmbH TSCOm17... -
Page 37: Power Loss Control
S3 state, then the resume path will place system back into S3. S5e Power State The conga-TS370 features a congatec proprietary Enhanced Soft-Off power state. See section 7.1.7 “Enhanced Soft-Off State” for more information. Copyright © 2018 congatec GmbH... -
Page 38: Oem Default Settings
Board Controller (cBC) The conga-TS370 is equipped with Microchip microcontroller. This onboard microcontroller plays an important role for most of the congatec embedded/industrial PC features. It fully isolates some of the embedded features such as system monitoring or the I²C bus from the x86 core architecture, which results in higher embedded feature performance and more reliability, even when the x86 processor is in a low power mode. -
Page 39: Oem Dxe Driver
Supported modes are “Always On”, “Remain Off” and “Last State”. AC power loss condition occurs when the module loses the standby voltage on the 5V_SB pins. On congatec modules, the standby voltage is continuously monitored after the system is turned off. If within 30 seconds the standby voltage is no longer detected, the module considers this an AC power loss condition. -
Page 40: Security Features
OEM POST Logo This feature allows system designers to replace the congatec POST logo displayed in the upper left corner of the screen during BIOS POST with their own BIOS POST logo. Use the congatec system utility CGUTIL 1.5.4 or later to replace/add the OEM POST logo. -
Page 41: Conga Tech Notes
OEM BIOS Code/Data With the congatec embedded BIOS it is possible for system designers to add their own code to the BIOS POST process. The congatec Embedded BIOS first calls the OEM code before handing over control to the OS loader. -
Page 42: Processor Performance Control
The architecture of the CGOS API driver provides the ability to write application software that runs unmodified on all congatec CPU modules. All the hardware related code is contained within the congatec embedded BIOS on the module. See section 1.1 of the CGOS API software developers guide, available on the congatec website. -
Page 43: Intel ® Virtualization Technology
3. To ensure that the TCC is active for only short periods of time, thus reducing the impact on processor performance to a minimum, it is necessary to have a properly designed thermal solution. The Intel ® Xeon, Core™ i7/i5/i3 and Celeron ® processor’s respective datasheet can provide you with more information about this subject. Copyright © 2018 congatec GmbH TSCOm17 43/75... -
Page 44: Acpi Suspend Modes And Resume Events
Any of the following can set the upper limit of Intel Turbo Boost Technology on a given workload: ® • Number of active cores • Estimated current consumption • Estimated power consumption • Processor temperature Copyright © 2018 congatec GmbH TSCOm17 44/75... -
Page 45: Signal Descriptions And Pinout Tables
See section 8.1 “Adaptive Thermal Monitor and Catastrophic Thermal Protection” for more information. The congatec board controller supports active cooling solution. The board controller controls the fan’s speed based on the temperature readings of the CPU. This feature does not require ACPI OS support. The only software-controlled thermal trip point on conga-TS370 is the Critical Trip Point. -
Page 46: Connector Signal Descriptions
In Device Manager look for the keyboard/mouse devices. Go to the Power Management tab and check ‘Allow this device to bring the computer out of standby’. RTC Alarm Activate and configure Resume On RTC Alarm in the Power setup menu. Only available in S5. Watchdog Power Button Event Wakes unconditionally from S3-S5. Copyright © 2018 congatec GmbH TSCOm17 46/75... - Page 47 The table below describes the terminology used in this section. The PU/PD column indicates if a pull-up or pull-down resistor has been used. If the field entry area in this column for the signal is empty, then no pull-up or pull-down resistor has been implemented by congatec. The “#”...
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Page 48: Table 11 Connector C-D Pinout
SATA2_TX- SATA3_TX- LVDS_A3+ LVDS_B3- SUS_S5# PWR_OK LVDS_A3- eDP_BKLT_EN/LVDS_BKLT_EN SATA2_RX+ SATA3_RX+ GND (FIXED) GND (FIXED) SATA2_RX- SATA3_RX- eDP_TX3+/LVDS_A_CK+ LVDS_B_CK+ BATLOW# eDP_TX3-/LVDS_A_CK- LVDS_B_CK- (S)ATA_ACT# HDA_SDIN2 eDP_AUX+/LVDS_I2C_CK eDP/LVDS_BKLT_CTRL HDA_SYNC HDA_SDIN1 eDP_AUX-/LVDS_I2C_DAT VCC_5V_SBY HDA_RST# HDA_SDIN0 GPI3 VCC_5V_SBY Copyright © 2018 congatec GmbH TSCOm17 48/75... - Page 49 PCIE_TX5+ PCIE_RX5+ A107 VCC_12V B107 VCC_12V PCIE_TX5- PCIE_RX5- A108 VCC_12V B108 VCC_12V GPI0 GPO1 A109 VCC_12V B109 VCC_12V PCIE_TX4+ PCIE_RX4+ A110 GND (FIXED) B110 GND (FIXED) Note Not connected Not supported Bootstrap signals Copyright © 2018 congatec GmbH TSCOm17 49/75...
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Page 50: Table 12 Pci Express Signal Descriptions (General Purpose)
PEG_TX8- DDI1_PAIR4+ RSVD GND (FIXED) GND (FIXED) DDI1_PAIR4- DDI1_PAIR0+ PEG_RX9+ PEG_TX9+ RSVD DDI1_PAIR0- PEG_RX9- PEG_TX9- RSVD RSVD RSVD RSVD DDI1_PAIR5+ DDI1_PAIR1+ DDI1_PAIR5- DDI1_PAIR1- PEG_RX10+ PEG_TX10+ GND (FIXED) GND (FIXED) PEG_RX10- PEG_TX10- DDI2_CTRLCLK_AUX+ DDI1_PAIR2+ Copyright © 2018 congatec GmbH TSCOm17 50/75... -
Page 51: Table 13 Pci Express Signal Descriptions (X16 Graphics)
PEG_RX0+ PEG_TX0+ C107 VCC_12V D107 VCC_12V PEG_RX0- PEG_TX0- C108 VCC_12V D108 VCC_12V TYPE0# PEG_LANE_RV# C109 VCC_12V D109 VCC_12V PEG_RX1+ PEG_TX1+ C110 GND (FIXED) D110 GND (FIXED) Note Not connected Not supported Bootstrap signals Copyright © 2018 congatec GmbH TSCOm17 51/75... - Page 52 O PCIE A PCI Express Gen2/3 compliant clock buffer chip must be PCIE_CLK_REF- and PCI Express Graphics Lanes used on the carrier board if the design involves more than one PCI Express device. Copyright © 2018 congatec GmbH TSCOm17 52/75...
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Page 53: Table 14 Ddi Signal Description
PCIE_RX[16-31] + and - PEG_RX1+ PEG_RX1- PEG_RX2+ PEG_RX2- PEG_RX3+ PEG_RX3- PEG_RX4+ PEG_RX4- PEG_RX5+ PEG_RX5- PEG_RX6+ PEG_RX6- PEG_RX7+ PEG_RX7- PEG_RX8+ PEG_RX8- PEG_RX9+ PEG_RX9- PEG_RX10+ PEG_RX10- PEG_RX11+ PEG_RX11- PEG_RX12+ PEG_RX12- PEG_RX13+ PEG_RX13- PEG_RX14+ PEG_RX14- PEG_RX15+ C101 PEG_RX15- C102 Copyright © 2018 congatec GmbH TSCOm17 53/75... -
Page 54: Table 15 Hdmi Signal Descriptions
(see note below) Note This signal has special functionality during the reset process. It may bootstrap some basic important functions of the module. For more information refer to section 9.2 “Bootstrap Signals”. Copyright © 2018 congatec GmbH TSCOm17 54/75... - Page 55 Bootstrap signal (see note below). DP AUX- function if DDI2_DDC_AUX_SEL is no connect I/O PCIE 3.3 V Enable strap is already populated HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high I/O OD 3.3 V Copyright © 2018 congatec GmbH TSCOm17 55/75...
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Page 56: Table 16 Displayport (Dp) Signal Descriptions
TMDS differential pair O PCIE TMDS1_DATA0- Multiplexed with DDI1_PAIR2+ and DDI1_PAIR2- TMDS1_DATA1+ TMDS differential pair O PCIE TMDS1_DATA1- Multiplexed with DDI1_PAIR1+ and DDI1_PAIR1- TMDS1_DATA2+ TMDS differential pair O PCIE TMDS1_DATA2- Multiplexed with DDI1_PAIR0+ and DDI1_PAIR0- Copyright © 2018 congatec GmbH TSCOm17 56/75... -
Page 57: Table 17 Embedded Displayport Signal Descriptions
1. Some signals have special functionality during the reset process. They may bootstrap some basic important functions of the module. For more information refer to section 9.2 “Bootstrap Signals”. 2. The conga-TS370 does not natively support TMDS. A DP++ to TMDS converter (e.g PTN3360D) needs to be implemented. Copyright © 2018 congatec GmbH TSCOm17 57/75... -
Page 58: Table 18 Crt Signal Descriptions
EDID access 3.3 V DP enable strap already populated DP3_LANE3+ Uni-directional main link for the transport of isochronous streams and O PCIE DP3_LANE3- secondary data Multiplexed with DDI3_PAIR3+ and DDI3_PAIR3- Copyright © 2018 congatec GmbH TSCOm17 58/75... -
Page 59: Table 20 Serial Ata Signal Descriptions
AUX+ AC coupled off module eDP_AUX- eDP AUX- AC coupled off module eDP_HPD Detection of hot plug / unplug and notification of the link layer I 3.3 V PD 100 kΩ Copyright © 2018 congatec GmbH TSCOm17 59/75... -
Page 60: Table 22 Usb 3.0 Signal Descriptions
DDC lines used for flat panel detection and control I/O 3.3 V PU 2k2 3.3V PU for LVDS support (default) LVDS_I2C_DAT DDC lines used for flat panel detection and control I/O 3.3 V PU 2k2 3.3V PU for LVDS support (default) Copyright © 2018 congatec GmbH TSCOm17 60/75... -
Page 61: Table 23 Gigabit Ethernet Signal Descriptions
USB 2.0 compliant. Backwards compatible to USB 1.1 USB7+ USB Port 7, data + or D+ USB 2.0 compliant. Backwards compatible to USB 1.1 USB7- USB Port 7, data - or D- USB 2.0 compliant. Backwards compatible to USB 1.1 Copyright © 2018 congatec GmbH TSCOm17 61/75... -
Page 62: Table 25 Lpc Signal Descriptions
Additional transmit signal differential pairs for the Superspeed USB data path USB_SSTX2- USB_SSRX3+ Additional receive signal differential pairs for the Superspeed USB data path USB_SSRX3- USB_SSTX3+ Additional transmit signal differential pairs for the Superspeed USB data path USB_SSTX3- Copyright © 2018 congatec GmbH TSCOm17 62/75... -
Page 63: Table 26 Spi Bios Flash Interface Signal Descriptions
This signal has special functionality during the reset process. It may bootstrap some basic important functions of the module. For more information refer to section 9.2 “Bootstrap Signals”. AC’97 codecs are not supported. Copyright © 2018 congatec GmbH TSCOm17 63/75... -
Page 64: Table 28 General Purpose I/O Signal Descriptions
This signal has special functionality during the reset process. It may bootstrap some basic important functions of the module. For more information refer to section 9.2 “Bootstrap Signals”. The conga-TS370 does not support ESPI mode. Copyright © 2018 congatec GmbH TSCOm17 64/75... -
Page 65: Table 29 Power And System Management Signal Descriptions
This signal has special function during the reset process. For more information, see section 9.2 “Bootstrap Signals”. Pins are protected on the module by a series schotty diode. Therefore, pull-down resistor is required on the carrier board for proper logic level. Copyright © 2018 congatec GmbH TSCOm17 65/75... -
Page 66: Table 31 Thermal Protection Signal Descriptions
(also known as “PS_ON”) may be used to enable the non-standby power on a typical ATX power supply SUS_S4# Indicates system is in Suspend to Disk state. Active low output O 3.3 VSB Not supported SUS_S5# Indicates system is in Soft Off state O 3.3 VSB Copyright © 2018 congatec GmbH TSCOm17 66/75... -
Page 67: Table 34 Module Type Definition Signal Description
Pin # Description PU/PD Comment SMB_CK System Management Bus bidirectional clock line I/O 3.3 VSB PU 2k2 3.3 VSB SMB_DAT# System Management Bus bidirectional data line I/O OD 3.3 PU 2k2 3.3 VSB Copyright © 2018 congatec GmbH TSCOm17 67/75... -
Page 68: Table 35 Power And Gnd Signal Descriptions
Types 1-6. A carrier can detect a R1.0 module by the presence of 12 V on this pin. R2.0 module Types 1-6 will no-connect this pin. Type 10 modules shall pull this pin to ground through a 4.7 kΩ resistor Copyright © 2018 congatec GmbH TSCOm17... -
Page 69: Bootstrap Signals
C76, C80, C84, C87, C90, C93, C96, C100, C103, C110, D1, D2, D5, D8, D11, D14, D21, D31, D41, D51, D60, D67, D70, D73, D76, D80, D84, D87, D90, D93, D96, D100, D103, D110 Copyright © 2018 congatec GmbH TSCOm17 69/75... -
Page 70: System Resources
2. No external DC loads or external pull-up or pull-down resistors should change the configuration of the signals listed in the above table. External resistors may override the internal strap states and cause the COM Express™ module to malfunction and/or cause irreparable damage to the module. Copyright © 2018 congatec GmbH TSCOm17 70/75... -
Page 71: Pci Configuration Space Map
On the conga-TS370 the PCIExpress Bus acts as the subtractive decoding agent. All I/O cycles that are not positively decoded are forwarded to the PCI Bus not the LPC Bus. Only specified I/O ranges are forwarded to the LPC Bus. In the congatec Embedded BIOS the following I/O address ranges are sent to the LPC Bus: 2Eh –... -
Page 72: Sm Bus
00h (Note2) PCI Express Root Port 2 00h (Note2) PCI Express Root Port 3 PCI to LPC Bridge Intel ® High Definition Audio (Intel ® HD Audio) SMBus Controller SPI Controller GbE Controller Copyright © 2018 congatec GmbH TSCOm17 72/75... -
Page 73: Bios Setup Description
8 x1) on the carrier board. The given bus numbers will change based on actual hardware configuration. 4. Internal PCI devices not connected to the conga-TS370 are not listed. 10.3 There are no onboard resources connected to the I²C bus. Address 16h is reserved for congatec Battery Management solutions. 10.4 SM Bus System Management (SM) bus signals are connected to the Intel chipset. -
Page 74: Supported Flash Devices
Navigating the BIOS Setup Menu The BIOS setup menu shows the features and options supported in the congatec BIOS. To access and navigate the BIOS setup menu, press the <DEL> or <F2> key during POST. The right frame displays the key legend. Above the key legend is an area reserved for text messages. These text messages explain the options and the possible impacts when changing the selected option in the left frame. -
Page 75: Industry Specifications
AMI AptioEFI firmware on an onboard flash ROM chip. You can update the firmware with the congatec System Utility. The utility has five versions— UEFI shell, DOS based command line , Win32 command line, Win32 GUI, and Linux version.
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