Disabling/Enabling Access To The Hardware; 4Th Generation Devices - Nvidia MSTFLINT Documentation

-v, --version
--device DEVICE, -d DEVICE
--disable_rshim
--disable_tracer
--disable_counter_rd
--disable_port_owner
r,restrict
p,privilege
q,query
-f, --full
Example of mlxprivhost:
• Enabling Full Host Restriction (Embedded ARM CPU Only):
mlxprivhost –d /dev/mst/mt41682_pciconf0 r --disable_rshim --disable_tracer --disable_counter_rd --
disable_port_owner
• Disabling Host Restriction (Embedded ARM CPU Only): :
mlxprivhost –d /dev/mst/mt41682_pciconf0 p
• Query the status of the host\hosts (the full flag valid for embedded ARM CPU Only):
mlxprivhost -d /dev/mst/mt41682_pciconf0 q --full
Host configurations
-------------------
host index
level
Port functions status:
-----------------------
disable_rshim
disable_tracer
disable_port_owner
disable_counter_rd

Disabling/Enabling Access to the Hardware

The secure host feature enables ConnectX family devices to block access to its internal hardware
registers. The hardware access in this mode is allowed only if a correct 64 bits key is provided.

The secure host feature requires a MLNX_OFED driver installed on the machine.

4th Generation Devices

To disable/enable access to the hardware:
1. Set the key:
Shows program's version number and exit
Device to work with.
When TRUE, the host does not have an RSHIM function to
access the embedded CPU registers
When TRUE, the host will not be allowed to own the Tracer
When TRUE, the host will not be allowed to read Physical port
counters
When TRUE, the host will not be allowed to be Port Owner
Set host 1 (Arm) privileged, host 0 (x86_64) restricted.
Set host 1 (Arm) privileged, host 0 (x86_64) privileged (back
to default).
Query current host configuration
Run with query command for high verbosity level - valid from
embedded ARM CPU only.
: 0 1
: PRIVILEGED PRIVILEGED
: FALSE FALSE
: FALSE FALSE
: FALSE FALSE
: FALSE FALSE
2 3
PRIVILEGED PRIVILEGED
FALSE FALSE
FALSE FALSE
FALSE FALSE
FALSE FALSE
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