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Deflate and Dump valve control signals are also generated by latch IC3 (Main Board) and passed to the GAL
IC1 (power supply board). Pump motor current is sensed in R31 and amplified by IC4. This is routed to the
system processor as PUMPC and also compared to a reference to produce an over current input signal to
the GAL. If pin 9 of GAL IC1 goes high, pin 12 (signal LATCHED_OVC) will be latched high and the pump
enable output will go high switching off the pump. The latched over current condition can be reset by the
Main Board processor asserting PNEURESET high.
The Deflate valve vents the system to atmosphere in its energized state. When the pump is operating, the
deflate valve is de-energized by the GAL IC1 turning off FET TR1b in the ground return side of the valve
circuit. If a failsafe, overpressure or deflate condition signal arrives on the GAL, the valve will be energized
and the system will rapidly deflate. The over-pressure signal is produced by the pump pressure transducer
and associated electronics, while the failsafe can be derived from the system processor' s watchdog output
as well as from the PIC IC5.
Conversely, the Dump valve vents the system to atmosphere in its de-energized state. When the pump is
operating during a determination cycle, the Dump valve remains energized, the GAL receiving a high level
DUMP signal from the latch IC3 on the Main Board. When the determination cycle is complete, or if an alarm
condition arises, the DUMP signal from latch IC3 will go low causing the GAL to turn off FET TR4a and de-
energize the dump valve, opening the system to atmosphere.
Because the action of deflation can be initiated by energizing one valve or de-energizing another, a power
failure during a determination will always result in de-pressurization of the system.
The action of operating the Dump and Deflate valves produces a voltage across R20/21 and R66. This
signal is labeled VALVESENSE and is routed to the multiplexer IC20 on the Main Board from where it can
be selected by the system processor. The four possible conditions of the Dump and Deflate valves can be
ascertained from the VALVESENSE signal.
Once the system processor has determined which cuff type is being used, it instructs latch IC3 to output an
ADULT signal to TR1. In the pump pressure transducer circuit on the Main Board, IC8 generates a high
precision 5 volt reference, which is made available to dual op-amps IC10 and IC21. This reference is
monitored by the system processor as PT2_REF. The buffered reference from IC21 is applied to excite the
pump output pressure transducer ML2 on the Main Board (Transducer mounted on Pump assembly on
revision 04 and earlier). The output of the transducer varies in proportion to the air pressure in the system.
The transducer ML2 output pins connect to IC11, an instrumentation op-amp in differential mode
configuration. An offset voltage derived from the voltage reference IC8 is buffered by IC10b and fed to IC11
it is then summed with the amplified difference signal from the transducer. IC11' s output is passed to the
analog multiplexer IC20 as PT2 and the inverting input of comparator IC15a where it is compared to the
over pressure limit.
Note: For revision 04 units and earlier the reference to IC25 on the Main Board in the following paragraphs
relates to IC10.
The system processor produces control signals POT_INC, POT_U/D and POT_CS to drive a digital
potentiometer IC13 which sets the gain of amplifier IC25a and hence the over pressure limit. The " high" end
of the digital pot is connected to the output of the output of IC25a while the " low" end of the pot connects to
the precision resistor chain formed by R47, 48, & 50. The " wiper" of the pot connects to the inverting input of
IC25a. During factory set-up, the over pressure alignment is trimmed by selecting IC13 and incrementing its
output up or down. After alignment is complete, jumper LK1 is removed, thus preventing chip select of the
digital pot.
The output of IC25b applies an offset to the Adult/Neonate threshold input of IC15a. The output of IC15a,
labeled UNFIL_OVP, is normally at a high logic level but changes to low when overpressure occurs. This
signal is available as an input to the PSU board as unfiltered overpressure (UNFIL_OVP). UNFIL_OVP is
then filtered by R49 and C27 and fed in to comparator IC15b to produce filtered overpressure signal
FLT_OVP and is made available to the PSU board. The overpressure threshold voltage reference is
22
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