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Detailed Description
3
Detailed Description
3.1
Hardware Description
The following subsections provide detailed information on the EVM hardware and jumper configuration
settings.
3.1.1
Theory of Operation
The block diagram of the BP-DAC11001EVM board is displayed in
different power and ground domains. All grounds are shorted together using single-point shorts. The EVM
board connects to the launchpad with the BoosterPack connectors. There is an onboard reference, using
the REF6250, that generates a 5-V voltage reference, that in turn is converted to 5-V and –5-V reference
inputs for the DAC. There is an option for an external reference using connectors J27 and J28. Both J27
and J28 form a force-sense pair that eliminate cable losses while connected to external reference
sources. The DAC output is provided on J3. Jumper J2 provides various feedback options for the output
amplifier. The DAC output can be taken through two-stage, second-order filters using connectors J7 and
J8. There is an option to interface an external circuit using auxiliary connectors J23 and J24.
REF_PWR
REF625 0
RC
FILTER
EXTERNAL
REFERENCE
REFGND
8
BP-DAC11001EVM
REF_PWR
VIO
VDD
VSS
REFGND
AGND
VDD
DVDD
REF_VCC
REF_VSS
VCC VSS DVDD IOVDD
REFP
DAC110 01
REFN
AGND
DGND
AGND
SPI
EXTERNAL
LDAC
LAUNCHP AD
INTERFACE
DGND
Figure 6. BP-DAC11001EVM Hardware Block Diagram
Copyright © 2019, Texas Instruments Incorporated
Figure
VCC
OUT_VCC OUT_VSS
AVDD
BUFFE RE D
DAC
OUTPUT
AGND-OUT
VDD
IOVDD
AEV M_3V3
VDD
DVDD
AEV M_5V0
www.ti.com
6. The dotted lines indicate
VCC
VSS
VDD
VIO
VREFP
INTERFACE FOR
AUXILIARY
CIRCUIT
AGND
AUXGND
DGND
FILT_VCC
FILT_VSS
FILTER1
FILTER2
SW
FILTGND
SLAU806 – October 2019
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VREFN
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