IBASE Technology SI-06 Series User Manual page 30

South Bridge
This section allows you to configure the South Bridge Chipset.
Main Advanced
► TPT Device
► PCI Express Root Port0
► PCI Express Root Port1
High Precision Event Timer Configuration
High Precision Timer
SLP_SP4 Assertion Width
High Precision Event Timer Configuration
Enable/or Disable the High Precision Event Timer.
SLP_S4 Assertion Stretch Enable
Select a minimum assertion width of the SLP_S4# signal.
TPT Device
Main Advanced
Azalia Controller
Select USB Mode
UHCI #1 (port 0 and 1)
UHCI #3 (port 4 and 5)
USB 2.0(EHCI) Support
Aptio Setup Utility
Chipset Boot
Enabled
1-2 Seconds
Aptio Setup Utility
Chipset Boot
HD Audio
By Controllers
Enabled
Enabled
Enabled
30
Security Save & Exit
→ ← Select Screen
↑↓ Select Item
Enter: Select
+- Change Opt
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save & Exit
Security Save & Exit
→ ← Select Screen
↑↓ Select Item
Enter: Select
+- Change Opt
F1: General Help
F2: Previous Values
F3: Optimized Default
F4: Save & Exit
ESC: Exit
ESC: Exit