Lvds Connector - Seco SBC-D23 User Manual

3.3.6

LVDS connector

LVDS connector CN9
Pin Signal Pin Signal
1 V_LED1- 2 V_LED+
3 V_LED2- 4 VCC_BKL_SW
5 VCC_LCD_SW 6 VCC_BKL_SW
7 +3P3V_RUN 8 GND
9 GND 10 LVDS_0_TX0+
11 LVDS_0_TX1+ 12 LVDS_0_TX0-
13 LVDS_0_TX1- 14 GND
15 GND 16 LVDS_0_TX2+
17 LVDS_0_TX3+ 18 LVDS_0_TX2-
19 LVDS_0_TX3- 20 GND
21 GND 22 LVDS_0_CLK+
23 --- 24 LVDS_0_CLK-
25 --- 26 GND
27 GND 28 ---
29 --- 30 ---
31 --- 32 GND
33 GND 34 ---
35 --- 36 TOUCH_INT#
37 DISPLAY_BKL_CTRL 38 GND
39 GND 40 GND
41 PANEL_ON 42 TOUCH_RST#
43 BKL_EN 44 VDD_TOUCH
45 LVDS_DDC_SCL 46 ---
47 LVDS_DDC_SDA 48 ---
49 GND 50 GND
LVDS_DDC_SCL: DisplayID I2C Clock line for LVDS flat Panel detection or for the management of an I2C Touch Screen Controller. Bidirectional signal, electrical
level +3P0V_VDD_PMU with a 2k2Ω pull-up resistor.
SBC-D23
SBC-D23 User Manual - Rev. First Edition: 1.0 - Last Edition: 1.0 - Author: S.B. - Reviewed by P.Z. - Copyright © 2021 SECO S.p.A.
SD23 can be interfaced to LCD displays using its LVDS interface, which allows
connecting 18 or 24 bit single channel displays. This interface is native of the PX30
Processor, with a maximum supported resolution of 1280x800 @ 60fps.
For the connection, a connector type HR A1014WA-S-2x25P or equivalent (2 x 25p,
male, straight, P1, low profile, polarised) is provided.
Mating connector: HR A1014H-2X25P with HR A1014-T female crimp terminals.
Alternative mating connector, MOLEX 501189-5010 with crimp terminals series
501334.
On the same connector are also implemented the signals for direct driving of display's backlight: voltages
(VCC_LCD_SW and VCC_BKL_SW) and control signals (LCD enable signal, PANEL_ON, Backlight enable
signal, BKL_EN, and Backlight Brightness Control signal with pulse width modulation, DISPLAY_BKL_CTRL).
There are also the signals necessary for driving I2C touchscreens (I2C signals, reset and interrupt request
signals).
dedicated signals (V_LED+, V_LED1-, V_LED2-), which are also available on the dedicated LED Driver connector
CN20. Please refer to paragraph 3.3.7 for a description of these signals
When building a cable for connection of LVDS displays, please take care of twist as tight as possible differential
pairs' signal wires, in order to reduce EMI interferences. Shielded cables are also recommended.
Here following the signals related to LVDS management:
LVDS_0_TX0+/ LVDS_0_TX0-: LVDS Channel differential data pair #0.
LVDS_0_TX1+/ LVDS_0_TX1-: LVDS Channel differential data pair #1.
LVDS_0_TX2+/ LVDS_0_TX2-: LVDS Channel differential data pair #2.
LVDS_0_TX3+/ LVDS_0_TX3-: LVDS Channel differential data pair #3.
LVDS_0_CLK+/LVDS_0_CLK-: LVDS Channel differential Clock.
LVDS_DDC_SDA: DisplayID I2C Data line for LVDS flat Panel detection or for the management of an I2C Touch
Screen Controller. Bidirectional signal, electrical level +3P0V_VDD_PMU with a 2k2Ω pull-up resistor.
ree
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