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A x e l H a r d w a r e M a n u a l
5
Power, reset and control
5.1
Power Supply Unit (PSU) and recommended power-up
sequence
Implementing correct power-up sequence for i.MX6 processors is not a
trivial task because several power rails are involved. AXEL SOM
simplifies this task and embeds all the needed circuitry. The following
picture shows a simplified block diagram of PSU/voltage monitoring
circuitry:
PSU
2V8 - 4V5
2
NVCC_CSI_EXT
NVCC_EIM_EXT
9
NVCC_SD3_EXT
NVCC_LCD_EXT
1
RTC_VBAT
Axel CPU module
Carrier
board
24/80
8
1
10
POWER
MANAGEMENT
CIRCUITRY
VIN
i.MX6
4
* Please refer to reset scheme
PMIC PF0100 E0
ON BOARD
PERIPHERALS
AND MEMORIES
MEMS
RTC
October, 2016
v . 1 . 0 . 5
3
CPU_PORn (active-low) is
driven low
5
PMIC_PWRON signal is
pulled-up
6
PMIC transitions from OFF
to ON
7
PMIC initiates power-up
state
sequence
11
needed by MX6 processor
CPU_PORn is
released
PMIC_PROG_VPG
M
PMIC_PROG_GATE_C
TRL
1
K
PMIC_PROG_SDA,SCL
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