Ddr3 Memory Bank; Nor Flash Bank - Dave Embedded Systems AXEL ULTRA Hardware Manual

A x e l H a r d w a r e M a n u a l
AXEL can mount three versions of the i.MX6 processor. The following
table shows a comparison between the processor models, highlighting
the differences:
Processor
i.MX6 Solo
i.MX6 Dual
i.MX6 Quad
Tab. 6: i.MX6 comparison
3.2

DDR3 memory bank

DDR3 SDRAM memory bank is composed by 4x 16-bit width chips
resulting in a 64-bit combined width bank.
The following table reports the SDRAM specifications:
CPU connection
Size min
Size max
Width
Speed
Tab. 7: DDR3 specifications
3.3

NOR flash bank

NOR flash is a Serial Peripheral Interface (SPI) device. This device is
connected to the eCSPI channel 5 and by default it acts as boot memory.
The following table reports the NOR flash specifications:
CPU connection
Size min
Size max
Chip select
Bootable
Tab. 8: NOR flash specifications
19/80
# Clock L2
cores cache
1 800 MHz 512 KB 32 bit @
1 GHz
2 850 MHz 1 MB
1 GHz
1.2 GHz
4 850 MHz 1MB
1 GHz
1.2 GHz
Multi-mode DDR controller (MMDC)
512 MB
4 GB
64 bit
533 MHz
eCSPI channel 5
8 MByte
64 MByte
ECSPI5_SS0
Yes
October, 2016
DDR3 Graphics acceleration
3D: Vivante GC880
400 MHz 2D: Vivante GC320
Vector: N.A.
64 bit @ 3D: Vivante GC2000
533 MHz 2D: Vivante GC320
Vector: Vivante GC335
64 bit @ 3D: Vivante GC2000
533 MHz 2D: Vivante GC320
Vector: Vivante GC335
v . 1 . 0 . 5
IPU VPU SATA-
II
1x 1x N.A.
2x 2x Yes
2x 2x Yes