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A x e l H a r d w a r e M a n u a l
3.4
NAND flash bank
On board main storage memory is a 8-bit wide NAND flash connected to
the CPU's Raw NAND flash controller. Optionally, it can act as boot
peripheral.
The following table reports the NAND flash specifications:
CPU connection
Page size
Size min
Size max
Width
Chip select
Bootable
Tab. 9: NAND flash specifications
3.5
Memory Map
For detailed information, please refer to chapter 2 "Memory Maps" of the
i.MX Applications Processor Reference Manual.
3.6
Power supply unit
AXEL, as the other ULTRA Line CPU modules, embeds all the elements
required for powering the unit, therefore power sequencing is self-
contained and simplified. Nevertheless, power must be provided from
carrier board, and therefore users should be aware of the ranges power
supply can assume as well as all other parameters. For detailed
information, please refer to Section 5.1.
3.7
CPU module connectors
All interface signals AXEL provides are routed through three 140 pin
0.6mm pitch stacking connectors (named J1, J2 and J3). The dedicated
carrier board must mount the mating connectors and connect the desired
peripheral interfaces according to AXEL pinout specifications.
For mechanical information, please refer to Section 4 (Mechanical
specifications). For pinout and peripherals information, please refer to
Sections 6 (Pinout table) and 7 (Peripheral interfaces).
20/80
Raw NAND flash controller
512 byte, 2 kbyte or 4 kbyte
128 MByte
2 GByte
8 bit
NANDF_CS0
Yes
October, 2016
v . 1 . 0 . 5
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