Analog Devices AD9912 Manual page 14

AD9912
650
600
550
500
NOM SKEW 25°C, 1.8V SUPPLY
WORST CASE (SLOW SKEW 90°C, 1.7V SUPPLY)
450
0 200
FREQUENCY (MHz)
Figure 27. HSTL Output Driver Single-Ended Peak-to-Peak Amplitude vs.
Toggle Rate (100 Ω Across Differential Pair)
2.5
2.0
1.5
1.0
NOM SKEW 25°C, 1.8V SUPPLY (20pF)
0.5
WORST CASE (SLOW SKEW 90°C,
1.7V SUPPLY (20pF))
0
0 10
FREQUENCY (MHz)
Figure 28. CMOS Output Driver Peak-to-Peak Amplitude vs. Toggle Rate
(AVDD3 = 1.8 V) with 20 pF Load
3.5
3.0
2.5
2.0
1.5
NOM SKEW 25°C, 1.8V SUPPLY (20pF)
WORST CASE (SLOW SKEW 90°C,
1.0
3.0V SUPPLY (20pF))
0.5
0
0 50
FREQUENCY (MHz)
Figure 29. CMOS Output Driver Peak-to-Peak Amplitude vs. Toggle Rate
(AVDD3 = 3.3 V) with 20 pF Load
400 600 800
20 30 40
100 150
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
0
Figure 30. Typical HSTL Output Waveform, Nominal Conditions,
DC-Coupled, Differential Probe Across 100 Ω load
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
0
Figure 31. Typical CMOS Output Driver Waveform (@ 1.8 V),
Nominal Conditions, Estimated Capacitance = 5 pF
3.3
2.8
2.3
1.8
1.3
0.8
0.3
–0.2
0
Figure 32. CMOS Output Driver Waveform (@ 3.3 V),
Nominal Conditions, Estimated Capacitance = 5 pF
Rev. D | Page 14 of 40
FREQUENCY = 600MHz
(20%→80%) = 104ps
t
RISE
(80%→20%) = 107ps
t
FALL
V p-p = 1.17V DIFF.
DUTY CYCLE = 50%
0.5 1.0 1.5
TIME (ns)
FREQUENCY = 20MHz
(20%→80%) = 5.5ns
t
RISE
(80%→20%) = 5.9ns
t
FALL
V p-p = 1.8V
DUTY CYCLE = 53%
20 40 60
TIME (ns)
FREQUENCY = 40MHz
(20%→80%) = 2.25ns
t
RISE
(80%→20%) = 2.6ns
t
FALL
V p-p = 3.3V
DUTY CYCLE = 52%
10 20 30
TIME (ns)
2.0 2.5
80 100
40 50